SN74LS623

Name: SN74LS623
Brand: TI
SKU: SN74LS623
Price: 3.5 USD

활성

8진 버스 트랜시버

지금 주문

데이터 시트

document-pdfAcrobat Octal Bus Transceivers datasheet (영어)

SN74LS623

활성

데이터 시트

지금 주문

제품 상세 정보

Supply voltage (min) (V)

4.75

Supply voltage (max) (V)

5.25

Number of channels

8

IOL (max) (mA)

24

IOH (max) (mA)

-15

Input type

TTL

Output type

TTL

Features

High speed (tpd 10-50ns)

Technology family

LS

Rating

Catalog

Operating temperature range (°C)

0 to 70

Supply voltage (min) (V)

4.75

Supply voltage (max) (V)

5.25

Number of channels

8

IOL (max) (mA)

24

IOH (max) (mA)

-15

Input type

TTL

Output type

TTL

Features

High speed (tpd 10-50ns)

Technology family

LS

Rating

Catalog

Operating temperature range (°C)

0 to 70

PDIP (N)

20

228.702 mm² 24.33 x 9.4

Bidirectional Bus Transceivers in High-Density 20-Pin Packages
Local Bus-Latch Capability
Hysteresis at Bus Inputs Improves Noise Margins
Choice of True or Inverting Logic
Choice of 3-State or Open-Collector Outputs

Bidirectional Bus Transceivers in High-Density 20-Pin Packages
Local Bus-Latch Capability
Hysteresis at Bus Inputs Improves Noise Margins
Choice of True or Inverting Logic
Choice of 3-State or Open-Collector Outputs

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing.

These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic levels at the enable inputs (G\BA and GAB).

The enable inputs can be used to disable the device so that the buses are effectively isolated.

The dual-enable configuration gives the 'LS620, 'LS621, and 'LS623 the capability to store data by simultaneous enabling of G\BA and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical for the 'LS621 and 'LS623 devices or complementary for the 'LS620.

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing.

These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic levels at the enable inputs (G\BA and GAB).

The enable inputs can be used to disable the device so that the buses are effectively isolated.

The dual-enable configuration gives the 'LS620, 'LS621, and 'LS623 the capability to store data by simultaneous enabling of G\BA and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical for the 'LS621 and 'LS623 devices or complementary for the 'LS620.

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