SN74LVTH16541

Name: SN74LVTH16541
Brand: TI
SKU: SN74LVTH16541
Price: 0.798 USD

활성

버스 홀드, TTL 호환 CMOS 입력 및 3상 출력을 지원하는 16채널, 2.7V~3.6V 버퍼

지금 주문

데이터 시트

document-pdfAcrobat SN54LVTH16541, SN74LVTH16541 datasheet (Rev. E) (영어)

SN74LVTH16541

활성

데이터 시트

지금 주문

제품 상세 정보

Technology family

LVT

Supply voltage (min) (V)

2.7

Supply voltage (max) (V)

3.6

Number of channels

16

IOL (max) (mA)

64

Supply current (max) (µA)

5000

IOH (max) (mA)

-32

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

LVT

Supply voltage (min) (V)

2.7

Supply voltage (max) (V)

3.6

Number of channels

16

IOL (max) (mA)

64

Supply current (max) (µA)

5000

IOH (max) (mA)

-32

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SSOP (DL)

48

164.358 mm² 15.88 x 10.35

TSSOP (DGG)

48

101.25 mm² 12.5 x 8.1

Members of the Texas Instruments Widebus™ Family
State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With 3.3-V V_CC)
Support Unregulated Battery Operation Down to 2.7 V
Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
I_off and Power-Up 3-State Support Hot Insertion
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 500 mA Per JESD 17
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

Widebus is a trademark of Texas Instruments.

Members of the Texas Instruments Widebus™ Family
State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With 3.3-V V_CC)
Support Unregulated Battery Operation Down to 2.7 V
Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
I_off and Power-Up 3-State Support Hot Insertion
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 500 mA Per JESD 17
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

Widebus is a trademark of Texas Instruments.

These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are noninverting 16-bit buffers composed of two 8-bit sections with separate output-enable signals. For either 8-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 8-bit buffer section are in the high-impedance state.

When V_CC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

The SN54LVTH16541 is characterized for operation over the full military temperature range of -55°C to 125°C.

The SN74LVTH16541 is characterized for operation from -40°C to 85°C.

These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are noninverting 16-bit buffers composed of two 8-bit sections with separate output-enable signals. For either 8-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 8-bit buffer section are in the high-impedance state.

When V_CC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

The SN54LVTH16541 is characterized for operation over the full military temperature range of -55°C to 125°C.

The SN74LVTH16541 is characterized for operation from -40°C to 85°C.

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기타 비인버팅 버퍼 및 드라이버 찾기

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new

대안 비교

비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀

74ACT16244

활성

TTL 호환 CMOS 입력 및 3상 출력을 지원하는 16채널, 4.5V~5.5V 버퍼 Voltage range (4.5V to 5.5V)

기술 자료

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17개 모두 보기

	유형	직함	날짜
*	Data sheet	SN54LVTH16541, SN74LVTH16541 datasheet (Rev. E)	2006/11/01
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)	2021/07/26
	Application note	An Overview of Bus-Hold Circuit and the Applications (Rev. B)	2018/09/17
	Selection guide	Logic Guide (Rev. AB)	2017/06/12
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	2015/12/02
	User guide	LOGIC Pocket Data Book (Rev. B)	2007/01/16
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	2004/07/08
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	2002/08/29
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)	2002/05/22
	Application note	Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices	2002/05/10
	Selection guide	Advanced Bus Interface Logic Selection Guide	2001/01/09
	Application note	LVT-to-LVTH Conversion	1998/12/08
	Application note	LVT Family Characteristics (Rev. A)	1998/03/01
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)	1997/08/01
	Application note	Input and Output Characteristics of Digital Integrated Circuits	1996/10/01
	Application note	Live Insertion	1996/10/01
	Application note	Understanding Advanced Bus-Interface Products Design Guide	1996/05/01