ADC12010
- Internal sample-and-hold
- Outputs 2.4V to 5V compatible
- Pin compatible with ADC12020, ADC12040, ADC12L063 and ADC12L066
- On-chip reference buffer
- Power down mode
Key Specifications
- Resolution 12 Bits
- Conversion Rate 10 MSPS (min)
- DNL ±0.3 LSB (typ)
- ENOB (fIN = 10.1 MHz) 11.3 bits (typ)
- Supply Voltage +5 / ±5 V / %
- Power Consumption, 10 MHz 160 mW (typ)
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The ADC12010 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 10 Megasamples per second (MSPS), minimum. This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 5V power supply, this device consumes just 160 mW at 10 MSPS, including the reference current. The Power Down feature reduces power consumption to 25 mW.
The differential inputs provide a full scale input swing equal to 2VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.
This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | ADC12010 12-Bit, 10 MSPS, 160 mW A/D Converter with Internal Sample-and-Hold datasheet (Rev. B) | 2013年 3月 14日 | |
| User guide | ADC12040/010/020/L063 12-Bit, 40/10/20/62 Msps ADC User Guide | 2012年 2月 20日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| LQFP (NEY) | 32 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。