產品詳細資料

Sample rate (max) (Msps) 80 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS, TTL Analog input BW (MHz) 450 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 425 Architecture Pipeline SNR (dB) 66 ENOB (Bits) 10.7 SFDR (dB) 80 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 80 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS, TTL Analog input BW (MHz) 450 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 425 Architecture Pipeline SNR (dB) 66 ENOB (Bits) 10.7 SFDR (dB) 80 Operating temperature range (°C) -40 to 85 Input buffer No
LQFP (NEY) 32 81 mm² 9 x 9
  • Single Supply Operation
  • Low Power Consumption
  • Power Down Mode
  • Internal or External Reference
  • Selectable Offset Binary or 2's Complement Data Format
  • Pin-Compatible with ADC12010, ADC12020, ADC12040, ADC12L063, ADC12L066

Key Specifications

  • Full Power Bandwidth: 450 MHz
  • DNL: ±0.4 LSB (typ)
  • SNR (fIN = 10 MHz): 66 dB (typ)
  • SFDR (fIN = 10 MHz): 80 dB (typ)
  • Power Consumption, 80 MHz
    • Operating: 425 mW (typ)
    • Power Down: 50 mW (typ)

All trademarks are the property of their respective owners.

  • Single Supply Operation
  • Low Power Consumption
  • Power Down Mode
  • Internal or External Reference
  • Selectable Offset Binary or 2's Complement Data Format
  • Pin-Compatible with ADC12010, ADC12020, ADC12040, ADC12L063, ADC12L066

Key Specifications

  • Full Power Bandwidth: 450 MHz
  • DNL: ±0.4 LSB (typ)
  • SNR (fIN = 10 MHz): 66 dB (typ)
  • SFDR (fIN = 10 MHz): 80 dB (typ)
  • Power Consumption, 80 MHz
    • Operating: 425 mW (typ)
    • Power Down: 50 mW (typ)

All trademarks are the property of their respective owners.

The ADC12L080 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 80 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. The ADC12L080 can be operated with either the internal or an external reference. Operating on a single 3.3V power supply, this device consumes just 425 mW at 80 MSPS, including the reference current. The Power Down feature reduces power consumption to just 50 mW.

The differential inputs provide a full scale input swing equal to ±VREF. The buffered, high impedance, single-ended external reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format may be selected as either offset binary or two's complement.

This device is available in the 32-lead LQFP package and operates over the industrial temperature range of −40°C to +85°C.

The ADC12L080 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 80 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. The ADC12L080 can be operated with either the internal or an external reference. Operating on a single 3.3V power supply, this device consumes just 425 mW at 80 MSPS, including the reference current. The Power Down feature reduces power consumption to just 50 mW.

The differential inputs provide a full scale input swing equal to ±VREF. The buffered, high impedance, single-ended external reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format may be selected as either offset binary or two's complement.

This device is available in the 32-lead LQFP package and operates over the industrial temperature range of −40°C to +85°C.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 2
類型 標題 日期
* Data sheet ADC12L080 12-Bit, 80MSPS, 450MHz Bandwidth ADC w/Internal Ref datasheet (Rev. B) 2013年 3月 4日
User guide ADC12L080, 12-Bit, 80 Msps A/D Converter User Guide 2012年 2月 21日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 針腳 CAD 符號、佔位空間與 3D 模型
LQFP (NEY) 32 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片