首頁 數據轉換器 類比轉數位轉換器 (ADC) 高速 ADC (≥10 MSPS)
首頁
數據轉換器
類比轉數位轉換器 (ADC)
高速 ADC (≥10 MSPS)

ADC12QS065

現行

四通道 12 位元 65-MSPS 類比轉數位轉換器 (ADC)

立即訂購
產品規格表

ADC12QS065

現行
產品規格表 立即訂購

產品詳細資料

Sample rate (max) (Msps) 65 Resolution (Bits) 12 Number of input channels 4 Interface type Serial LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 828 Architecture Pipeline SNR (dB) 69.3 ENOB (Bits) 11.2 SFDR (dB) 83.3 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 65 Resolution (Bits) 12 Number of input channels 4 Interface type Serial LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 828 Architecture Pipeline SNR (dB) 69.3 ENOB (Bits) 11.2 SFDR (dB) 83.3 Operating temperature range (°C) -40 to 85 Input buffer No
WQFN (NKA) 60 81 mm² 9 x 9
  • Single +3.3V Supply Operation
  • Internal Sample-and-Hold and Internal Reference
  • Low Power Consumption
  • Power Down Mode
  • Clock and Data Frame Timing
  • 780 Mbps Serial LVDS Data Rate (at 65 MHz Clock)
  • LVDS Serial Output Rated for 100 Ohm Load

Key Specifications

  • Resolution: 12 Bits
  • DNL: ±0.3 LSB (Typ)
  • SNR (fIN = 5 MHz): 69 dB (Typ)
  • SFDR (fIN = 5 MHz): 83 dB (Typ)
  • ENOB (at Nyquist): 11 Bits (Typ)
  • Power Consumption
    • Operating, 65 MSPS, per ADC: 200 mW (Typ)
    • Power Down Mode: < 3 mW (Typ)

All trademarks are the property of their respective owners.

  • Single +3.3V Supply Operation
  • Internal Sample-and-Hold and Internal Reference
  • Low Power Consumption
  • Power Down Mode
  • Clock and Data Frame Timing
  • 780 Mbps Serial LVDS Data Rate (at 65 MHz Clock)
  • LVDS Serial Output Rated for 100 Ohm Load

Key Specifications

  • Resolution: 12 Bits
  • DNL: ±0.3 LSB (Typ)
  • SNR (fIN = 5 MHz): 69 dB (Typ)
  • SFDR (fIN = 5 MHz): 83 dB (Typ)
  • ENOB (at Nyquist): 11 Bits (Typ)
  • Power Consumption
    • Operating, 65 MSPS, per ADC: 200 mW (Typ)
    • Power Down Mode: < 3 mW (Typ)

All trademarks are the property of their respective owners.

The ADC12QS065 is a low power, high performance CMOS 4-channel analog-to-digital converter with LVDS serialized outputs. The ADC12QS065 digitizes signals to 12 bits resolution at sampling rates up to 65 MSPS while consuming a typical 200 mW/ADC from a single 3.3V supply. Sampled data is transformed into high speed serial LVDS output data streams. Clock and frame LVDS pairs aid in data capture. The ADC12QS065’s six differential pairs transmit data over backplanes or cable and also make PCB design easier. In addition, the reduced cable, PCB trace count, and connector size tremendously reduce cost.

No missing codes performance is ensured over the full operating temperature range. The pipeline ADC architecture achieves 11 Effective Bits over the entire Nyquist band at 65 MSPS.

When not converting, power consumption can be reduced by pulling the PD (Power Down) pin high, placing the converter into a low power state where it typically consumes less than 3 mW total, and from which recovery is less than 5 ms. The ADC12QS065's speed, resolution and single supply operation makes it well suited for a variety of applications in ultrasound, imaging, video and communications. Operating over the industrial (-40°C to +85°C) temperature range, the ADC12QS065 is available in a 60-pin WQFN package with exposed pad (9x9x0.8mm, 0.5mm pin pitch).

The ADC12QS065 is a low power, high performance CMOS 4-channel analog-to-digital converter with LVDS serialized outputs. The ADC12QS065 digitizes signals to 12 bits resolution at sampling rates up to 65 MSPS while consuming a typical 200 mW/ADC from a single 3.3V supply. Sampled data is transformed into high speed serial LVDS output data streams. Clock and frame LVDS pairs aid in data capture. The ADC12QS065’s six differential pairs transmit data over backplanes or cable and also make PCB design easier. In addition, the reduced cable, PCB trace count, and connector size tremendously reduce cost.

No missing codes performance is ensured over the full operating temperature range. The pipeline ADC architecture achieves 11 Effective Bits over the entire Nyquist band at 65 MSPS.

When not converting, power consumption can be reduced by pulling the PD (Power Down) pin high, placing the converter into a low power state where it typically consumes less than 3 mW total, and from which recovery is less than 5 ms. The ADC12QS065's speed, resolution and single supply operation makes it well suited for a variety of applications in ultrasound, imaging, video and communications. Operating over the industrial (-40°C to +85°C) temperature range, the ADC12QS065 is available in a 60-pin WQFN package with exposed pad (9x9x0.8mm, 0.5mm pin pitch).

filter 尋找其它 高速 ADC (≥10 MSPS)
下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 3
類型 標題 日期
* Data sheet ADC12QS065 Quad 12-Bit 65 MSPS A/D Converter with LVDS Serialized Outputs datasheet (Rev. I) 2013年 4月 12日
Application note Understanding High-Speed Signals, Clocks, and Data Capture 2005年 10月 18日
White paper Data Converter Serial LVDS Interface Improves Board Routing 2005年 8月 1日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

ADC12QS065 IBIS Model

SNOM006.ZIP (5 KB) - IBIS Model
下載
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (NKA) 60 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片