ADC14DS080
- Clock Duty Cycle Stabilizer
- Single +3.0V or 3.3V Supply Operation
- Serial LVDS Outputs
- Serial Control Interface
- Overrange Outputs
- 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)
Key Specifications
- Resolution: 14 Bits
- Conversion Rate: 80 MSPS
- SNR: (fIN = 170 MHz) 72 dBFS (typ)
- SFDR: (fIN = 170 MHz) 82 dBFS (typ)
- Full Power Bandwidth: 1 GHz (typ)
- Power Consumption: 800 mW (typ)
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The ADC14DS080 is a high-performance CMOS analog-to-digital converter capable of converting two analog input signals into 14-bit digital words at rates up to 80 Mega Samples Per Second (MSPS). The digital outputs are serialized and provided on differential LVDS signal pairs. These converters use a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 1 GHz. The ADC14DS080 may be operated from a single +3.0V or 3.3V power supply. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC14DS080 can be operated with an external 1.2V reference. Output data format (offset binary versus 2's complement) and duty cycle stabilizer are selectable. The duty cycle stabilizer maintains performance over a wide range of clock duty cycles. A serial interface allows access to the control registers for full control of the ADC14DS80 functionality. The ADC14DS080 is available in a 60-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ADC14DS080 Dual 14-Bit, 80 MSPS A/D Converter with Serial LVDS Outputs datasheet (Rev. B) | 2013年 4月 2日 | |
User guide | ADC12DS080/ADC14DS080/ADC12DS105/ADC14DS105 User Guide | 2012年 2月 21日 | ||
Application note | Send High-Speed ADC Data Remotely And Quietly Using LVDS | 2003年 3月 27日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
WQFN (NKA) | 60 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點