CDCS503-Q1

Name: CDCS503-Q1
Brand: TI
SKU: CDCS503-Q1
Price: 0.537 USD

現行

具可選 SSC 的自動時脈緩衝器/時脈倍頻器

立即訂購

產品規格表

document-pdfAcrobat Clock Buffer/Clock Multiplier With Optional SSC datasheet (Rev. B) (英文)

CDCS503-Q1

現行

產品規格表

立即訂購

產品詳細資料

Function

Spread-spectrum clock generator

Number of outputs

Output frequency (max) (MHz)

108

Core supply voltage (V)

3.3

Output supply voltage (V)

3.3

Input type

LVCMOS

Output type

LVCMOS

Operating temperature range (°C)

-40 to 105

Features

Pin programmable, Spread-spectrum clocking (SSC)

Rating

Automotive

Function

Spread-spectrum clock generator

Number of outputs

Output frequency (max) (MHz)

108

Core supply voltage (V)

3.3

Output supply voltage (V)

3.3

Input type

LVCMOS

Output type

LVCMOS

Operating temperature range (°C)

-40 to 105

Features

Pin programmable, Spread-spectrum clocking (SSC)

Rating

Automotive

TSSOP (PW)

19.2 mm² 3 x 6.4

Qualified for Automotive Applications
AEC-Q100 Test Guidance With the Following Results:
- Device Temperature Grade 2
- –40°C to 105°C
  Ambient Operating Temperature Range
- Device HBM ESD Classification Level H2
- Device CDM ESD Classification Level C3B
Part of a Family of Easy to Use Clock Generator
Devices With Optional Spread Spectrum Clocking (SSC)
Clock Multiplier With Selectable Output Frequency and Selectable SSC
SSC Controllable Through Two External Pins
- ±0%, ±0.5%, ±1%, ±2% Center Spread
Frequency Multiplication Selectable Between x1 or x4 With One External Control Pin
Output Disable Through Control Pin
Single 3.3 V Device Power Supply
Wide Temperature Range –40°C to 105°C
Low Space Consumption 8-Pin TSSOP Package

Qualified for Automotive Applications
AEC-Q100 Test Guidance With the Following Results:
- Device Temperature Grade 2
- –40°C to 105°C
  Ambient Operating Temperature Range
- Device HBM ESD Classification Level H2
- Device CDM ESD Classification Level C3B
Part of a Family of Easy to Use Clock Generator
Devices With Optional Spread Spectrum Clocking (SSC)
Clock Multiplier With Selectable Output Frequency and Selectable SSC
SSC Controllable Through Two External Pins
- ±0%, ±0.5%, ±1%, ±2% Center Spread
Frequency Multiplication Selectable Between x1 or x4 With One External Control Pin
Output Disable Through Control Pin
Single 3.3 V Device Power Supply
Wide Temperature Range –40°C to 105°C
Low Space Consumption 8-Pin TSSOP Package

The CDCS503-Q1 device is a spread spectrum capable, LVCMOS input clock buffer with selectable frequency multiplication.

It shares major functionality with the CDCS502 but uses a LVCMOS input stage instead of the crystal input stage of the CDCS502, and the CDCS503-Q1 has an output enable pin.

The device accepts a 3.3-V LVCMOS signal at the input.

The input signal is processed by a phased-locked loop (PLL), whose output frequency is either equal to the input frequency or multiplied by the factor of four.

The PLL is also able to spread the clock signal by ±0%, ±0.5%, ±1% or ±2% centered around the output clock frequency with a triangular modulation.

By this, the device can generate output frequencies between 8 MHz and 108 MHz with or without SSC.

A separate control pin can be used to enable or disable the output. The CDCS503-Q1 device operates in a 3.3-V environment.

It is characterized for operation from –40°C to 105°C, and available in an 8-pin TSSOP package.

The CDCS503-Q1 device is a spread spectrum capable, LVCMOS input clock buffer with selectable frequency multiplication.

It shares major functionality with the CDCS502 but uses a LVCMOS input stage instead of the crystal input stage of the CDCS502, and the CDCS503-Q1 has an output enable pin.

The device accepts a 3.3-V LVCMOS signal at the input.

The input signal is processed by a phased-locked loop (PLL), whose output frequency is either equal to the input frequency or multiplied by the factor of four.

The PLL is also able to spread the clock signal by ±0%, ±0.5%, ±1% or ±2% centered around the output clock frequency with a triangular modulation.

By this, the device can generate output frequencies between 8 MHz and 108 MHz with or without SSC.

A separate control pin can be used to enable or disable the output. The CDCS503-Q1 device operates in a 3.3-V environment.

It is characterized for operation from –40°C to 105°C, and available in an 8-pin TSSOP package.

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檢視所有 2

	類型	標題		日期
*	Data sheet	Clock Buffer/Clock Multiplier With Optional SSC datasheet (Rev. B)		2012年 7月 21日
	Application note	Spread Spectrum Clocking Using the CDCS502/503		2009年 8月 19日

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