CSD83325L
- Common drain configuration
- Low-on resistance
- Small footprint of 2.2 mm × 1.15 mm
- Lead free
- RoHS compliant
- Halogen free
- Gate ESD protection
This 12-V, 9.9-mΩ, 2.2-mm × 1.15-mm LGA Dual NexFET™ power MOSFET is designed to minimize resistance and gate charge in a small footprint. Its small footprint and common drain configuration make the device ideal for battery pack applications in small handheld devices.
技術文件
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檢視所有 9 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | CSD83325L 12-V Dual N-Channel NexFET™ Power MOSFET datasheet (Rev. C) | PDF | HTML | 2023年 10月 6日 |
Application note | MOSFET Support and Training Tools (Rev. F) | PDF | HTML | 2024年 6月 14日 | |
Application note | Semiconductor and IC Package Thermal Metrics (Rev. D) | PDF | HTML | 2024年 3月 25日 | |
Application note | Using MOSFET Transient Thermal Impedance Curves In Your Design | PDF | HTML | 2023年 12月 18日 | |
Application note | Solving Assembly Issues with Chip Scale Power MOSFETs | PDF | HTML | 2023年 12月 14日 | |
Application note | Using MOSFET Safe Operating Area Curves in Your Design | PDF | HTML | 2023年 3月 13日 | |
Application brief | Tips for Successfully Paralleling Power MOSFETs | PDF | HTML | 2022年 5月 31日 | |
More literature | WCSP Handling Guide | 2019年 11月 7日 | ||
Design guide | FemtoFET Surface Mount Guide (Rev. D) | 2016年 7月 7日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
支援軟體
MOSFET power loss calculator for non-synchronous boost converter
計算工具
SYNC-BUCK-FET-LOSS-CALC — Power Loss Calculation Tool for Synchronous Buck Converter
Quickly trade off size, cost and performance to select the optimal MOSFET based on application conditions.
支援產品和硬體
產品
MOSFET
參考設計
PMP4496 — 具有快速充電器輸入的 USB-C DRP 行動電源參考設計
PMP4496 is a power bank reference design with a single USB type C dual role port (DRP). It can perform as a SINK or SOURCE. Role is automatically determined according to the external device attached. Fast charger input is also supported to save more charging time.
參考設計
TIDA-00712 — 智慧型手錶電池管理解決方案參考設計
This reference design is for smartwatch battery management solution (BMS). It is suitable for low-power wearable devices like smartwatch applications. The design includes an ultra-low current 1 cell Li-ion linear charger; a highly integrated Qi-compliant wireless power receiver; a (...)
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
PICOSTAR (YJE) | 6 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。