產品詳細資料

Resolution (bps) 14 Number of channels 2 Sample rate (Msps) 40 Gain (min) (dB) -3.8 Gain (max) (dB) 18.4 Pd (typ) (mW) 356 Supply voltage (max) (V) 3.3 Operating temperature range (°C) -55 to 125 Output data format LVDS Rating Space
Resolution (bps) 14 Number of channels 2 Sample rate (Msps) 40 Gain (min) (dB) -3.8 Gain (max) (dB) 18.4 Pd (typ) (mW) 356 Supply voltage (max) (V) 3.3 Operating temperature range (°C) -55 to 125 Output data format LVDS Rating Space
CFP (NBB) 68 582.2569 mm² 24.13 x 24.13
  • Radiation Hardened
    • TID 100 krad(Si)
    • Single Event Latch-Up (SEL) Immune to LET = 120 MeV-cm2/mg
    • Single Event Functional Interrupt (SEFI) Free to 120 MeV-cm2/mg
    • SMD 5962R1820301VXC
  • ADC Resolution: 14-Bit
  • ADC Sampling Rate: 5 MSPS to 40 MSPS
  • Input Level: 2.85 V
  • Supply Voltages 3.3 V and 1.8 V (Nominal)
    • 125 mW per Channel at 15 MSPS
    • 178 mW per Channel at 40 MSPS
  • CDS or S/H Processing for CCD or CIS Sensors
    • CDS or S/H Gain 0 dB or 6 dB
  • Programmable Analog Gain for Each Channel
    • 256 Steps; Range –3 dB to 18 dB
  • Programmable Analog Offset Correction
    • Fine and Coarse DAC Resolution ±8 Bits
    • Fine DAC Range ±5 mV
    • Coarse DAC Range ±250 mV
  • Programmable Input Clamp Voltage
  • Programmable Sample Edge: 1/64th Pixel Period
  • INL at 15 MHz: ±3.5 LSB
  • Noise Floor: –79 dB
  • Crosstalk: –80 dB
  • Operating Temp: –55°C to 125°C
  • Radiation Hardened
    • TID 100 krad(Si)
    • Single Event Latch-Up (SEL) Immune to LET = 120 MeV-cm2/mg
    • Single Event Functional Interrupt (SEFI) Free to 120 MeV-cm2/mg
    • SMD 5962R1820301VXC
  • ADC Resolution: 14-Bit
  • ADC Sampling Rate: 5 MSPS to 40 MSPS
  • Input Level: 2.85 V
  • Supply Voltages 3.3 V and 1.8 V (Nominal)
    • 125 mW per Channel at 15 MSPS
    • 178 mW per Channel at 40 MSPS
  • CDS or S/H Processing for CCD or CIS Sensors
    • CDS or S/H Gain 0 dB or 6 dB
  • Programmable Analog Gain for Each Channel
    • 256 Steps; Range –3 dB to 18 dB
  • Programmable Analog Offset Correction
    • Fine and Coarse DAC Resolution ±8 Bits
    • Fine DAC Range ±5 mV
    • Coarse DAC Range ±250 mV
  • Programmable Input Clamp Voltage
  • Programmable Sample Edge: 1/64th Pixel Period
  • INL at 15 MHz: ±3.5 LSB
  • Noise Floor: –79 dB
  • Crosstalk: –80 dB
  • Operating Temp: –55°C to 125°C

The LM98640QML-SP is a fully integrated, high performance 14-Bit, 5-MSPS to 40-MSPS signal processing solution. The Serial LVDS output format performs well during single event exposure, preventing data loss. The LM98640QML-SP has an adaptive power scaling feature to optimize power consumption based on the operating frequency and amount of gain required. High-speed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for CIS and CMOS image sensors). The sampling edges are programmable to a resolution of 1/64th of a pixel period. Both the CDS and S/H have a programmable gain of either 0 dB or 6 dB. The signal paths utilize two ±8-bit offset correction DACs for coarse and fine offset correction, and 8-bit Programmable Gain Amplifiers (PGA) that can be programmed independently for each input. The signals are then routed to two on chip 14-bit 40-MHz high performance analog-to-digital converters (ADC). The fully differential processing channel provides exceptional noise immunity, having a very low noise floor of –79 dB at 1x gain.

The LM98640QML-SP is a fully integrated, high performance 14-Bit, 5-MSPS to 40-MSPS signal processing solution. The Serial LVDS output format performs well during single event exposure, preventing data loss. The LM98640QML-SP has an adaptive power scaling feature to optimize power consumption based on the operating frequency and amount of gain required. High-speed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for CIS and CMOS image sensors). The sampling edges are programmable to a resolution of 1/64th of a pixel period. Both the CDS and S/H have a programmable gain of either 0 dB or 6 dB. The signal paths utilize two ±8-bit offset correction DACs for coarse and fine offset correction, and 8-bit Programmable Gain Amplifiers (PGA) that can be programmed independently for each input. The signals are then routed to two on chip 14-bit 40-MHz high performance analog-to-digital converters (ADC). The fully differential processing channel provides exceptional noise immunity, having a very low noise floor of –79 dB at 1x gain.

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類型 標題 日期
* Data sheet LM98640QML-SP Radiation Hardness Assured (RHA), Dual Channel, 14-Bit, 40-MSPS Analog Front End With LVDS Output datasheet (Rev. G) PDF | HTML 2018年 11月 28日
* SMD LM98640QML-SP SMD 5962-18203 2020年 9月 22日
* Radiation & reliability report LM98640QML SEE Report 2012年 5月 14日
* Radiation & reliability report LM98640W-MLS SEE Report 2012年 5月 14日
* Radiation & reliability report LM98640W-MLS TID Report 2012年 5月 14日
Application brief DLA Approved Optimizations for QML Products (Rev. B) PDF | HTML 2024年 5月 17日
Selection guide TI Space Products (Rev. J) 2024年 2月 12日
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 2023年 8月 31日
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 2022年 11月 17日
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022年 10月 19日
E-book Radiation Handbook for Electronics (Rev. A) 2019年 5月 21日
Application brief CCD and CMOS Imagers in Space: Signal Processing Challenges and Solutions 2018年 11月 5日
EVM User's guide LM98640CVAL Evaluation Board User’s Guide 2012年 1月 25日

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LM98640CVAL — 具有 LVDS 輸出的雙通道、14 位元、40 MSPS 類比前端

The LM98640CVAL Board is designed to allow quick evaluation and design development of TI's LM98640QML Analog Front End. This development board is designed to function in several different configurations.

The primary configuration connects the LM98640QML evaluation board to TI's Wavevision 5 Data (...)

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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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