LMKDB1202
- LP-HCSL clock buffer and clock MUX that support:
- PCIe Gen 1 to Gen 6
- CC (Common Clock) and IR (Independent Reference) PCIe architectures
- Input clock with or without SSC
- DB2000QL compliant:
- All devices meet DB2000QL specifications
- LMKDB1120 is pin-compatible to DB2000QL
- Extremely low additive jitter:
- 31fs maximum 12kHz to 20MHz RMS additive jitter at 156.25MHz
- 13fs maximum additive jitter for PCIe Gen 4
- 5fs maximum additive jitter for PCIe Gen 5
- 3fs maximum additive jitter for PCIe Gen 6
- Fail-safe input
- Flexible power-up sequence
- Automatic output disable
- Individual output enable
- SBI (Side Band Interface) for high-speed output enable or disable
- LOS (Loss of Signal) input detection
- 85Ω or 100Ω output impedance
- 1.8V / 3.3V ± 10% power supply
- –40°C to 105°C ambient temperature
The LMKDB devices are a family of extremely-low-jitter LP-HCSL buffers and MUX that support PCIe Gen 1 to Gen 6 and are DB2000QL compliant. The devices provide flexible power-up sequence, fail-safe inputs, individual output enable and disable pins, loss of input signal (LOS) detection and automatic output disable features, as well as excellent power supply noise rejection performance.
Both 1.8V and 3.3V supply voltages are supported. For LMKDB1120, 1.8V power supply saves 250mW power compared to 3.3V.
技術文件
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檢視所有 5 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | LMKDB1xxx PCIe Gen 1 to Gen 6 Ultra Low Jitter 1:20, 1:8, 1:4, 1:2, 2:4, 2:2 LP-HCSL Clock Buffer and Clock MUX datasheet (Rev. D) | PDF | HTML | 2024年 6月 19日 |
User guide | RC19XXX, 9QXL2001X vs. LMKDB1XXX, CDCDB2000 Drop-In Replacement Guide. | PDF | HTML | 2024年 7月 18日 | |
EVM User's guide | LMKDB1x02 Evaluation Module User's Guide | PDF | HTML | 2024年 6月 26日 | |
Certificate | LMKDB1202EVM Declaration of Conformity (DoC) | 2024年 6月 13日 | ||
Application note | Clocking for PCIe Applications | PDF | HTML | 2023年 11月 28日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
LMKDB1202EVM — LMKDB1202 評估模組
LMKDB1202 評估模組 (EVM) 旨在提供快速設定,以評估支援 PCIe Gen 1 至 Gen 6 的 LMKDB1202 LP-HCSL 緩衝器。印刷電路板 (PCB) 包含多個跨接器,可啟用 LMKDB1202 使用者編程和設定。EVM 提供 LMKDB1202 裝置的合規測試、系統原型設計和性能評估的靈活性。
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
VQFN (REY) | 20 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。