產品詳細資料

Number of ADC channels 2 Number of DAC channels 2 Digital audio interface DSP, I2S, L, R Analog inputs 6 Analog outputs 5 Sampling rate (max) (kHz) 50 Rating Catalog Features Automatic level control (ALC), Notch filter ADC SNR (typ) (dB) 90 DAC SNR (typ) (dB) 93 Operating temperature range (°C) -40 to 85
Number of ADC channels 2 Number of DAC channels 2 Digital audio interface DSP, I2S, L, R Analog inputs 6 Analog outputs 5 Sampling rate (max) (kHz) 50 Rating Catalog Features Automatic level control (ALC), Notch filter ADC SNR (typ) (dB) 90 DAC SNR (typ) (dB) 93 Operating temperature range (°C) -40 to 85
VQFN (RHB) 32 25 mm² 5 x 5
  • Analog Front End:
    • Stereo Single-Ended Input With Multiplexer
    • Mono Differential Input
    • Stereo Programmable Gain Amplifier
    • Microphone Amplifier (20 dB) and Bias
  • Analog Back End:
    • Stereo/Mono Line Output With Volume
    • Stereo/Mono Headphone Amplifier With Volume and Capless Mode
    • Stereo/Mono Digital Speaker Amplifier (BTL) With Volume
  • Analog Performance:
    • Dynamic Range: 93 dB (DAC)
    • Dynamic Range: 90 dB (ADC)
    • 40-mW + 40-mW Headphone Output at RL = 16
  • Power Supply Voltage
    • 1.71 V to 3.6 V for Digital I/O Section
    • 1.71 V to 3.6 V for Digital Core Section
    • 2.4 V to 3.6 V for Analog Section
    • 2.4 V to 3.6 V for Power Amplifier Section
  • Low Power Dissipation:
    • 7 mW in Playback, 1.8 V/2.4 V, 48 kHz
    • 13 mW in Record, 1.8 V/2.4 V, 48 kHz
    • 3.3 µW in Power Down
  • Sampling Frequency: 5 kHz to 50 kHz
  • Automatic Level Control for Recording
  • Operation From a Single Clock Input Without PLL
  • System Clock:
    • Common-Audio Clock (256 fS/384 fS), 12/24, 13/26, 13.5/27, 19.2/38.4, 19.68/39.36 MHz
  • Headphone Plug Insert Detection
  • 2 (I2C) or 3 (SPI) Wire Serial Control
  • Programmable Function by Register Control:
    • Digital Attenuation of DAC: 0 dB to -62 dB
    • Digital Gain of DAC: 0, 6, 12, 18 dB
    • Power Up/Down Control for Each Module
    • 6-dB to -70-dB Gain for Analog Outputs
    • 30-dB to -12-dB Gain for Analog Inputs
    • 0/20 dB Selectable for Microphone Input
    • 0-dB to -21-dB Gain for Analog Mixing
    • Parameter Settings for ALC
    • Three-Band Tone Control and 3D Sound
    • High-Pass Filter: 4-, 120-, 240-Hz
    • Two-Stage Programmable Notch Filter
    • Analog Mixing Control
  • Pop-Noise Reduction Circuit
  • Short and Thermal Protection Circuit
  • Package: 5-mm × 5-mm QFN Pacakge
  • Operation Temperature Range: -40°C to 85°C
  • APPLICATIONS
    • Portable Audio Player, Cellular Phone
    • Video Camcorder, Digital Movie/Still Camera
    • PMP/DMB

  • Analog Front End:
    • Stereo Single-Ended Input With Multiplexer
    • Mono Differential Input
    • Stereo Programmable Gain Amplifier
    • Microphone Amplifier (20 dB) and Bias
  • Analog Back End:
    • Stereo/Mono Line Output With Volume
    • Stereo/Mono Headphone Amplifier With Volume and Capless Mode
    • Stereo/Mono Digital Speaker Amplifier (BTL) With Volume
  • Analog Performance:
    • Dynamic Range: 93 dB (DAC)
    • Dynamic Range: 90 dB (ADC)
    • 40-mW + 40-mW Headphone Output at RL = 16
  • Power Supply Voltage
    • 1.71 V to 3.6 V for Digital I/O Section
    • 1.71 V to 3.6 V for Digital Core Section
    • 2.4 V to 3.6 V for Analog Section
    • 2.4 V to 3.6 V for Power Amplifier Section
  • Low Power Dissipation:
    • 7 mW in Playback, 1.8 V/2.4 V, 48 kHz
    • 13 mW in Record, 1.8 V/2.4 V, 48 kHz
    • 3.3 µW in Power Down
  • Sampling Frequency: 5 kHz to 50 kHz
  • Automatic Level Control for Recording
  • Operation From a Single Clock Input Without PLL
  • System Clock:
    • Common-Audio Clock (256 fS/384 fS), 12/24, 13/26, 13.5/27, 19.2/38.4, 19.68/39.36 MHz
  • Headphone Plug Insert Detection
  • 2 (I2C) or 3 (SPI) Wire Serial Control
  • Programmable Function by Register Control:
    • Digital Attenuation of DAC: 0 dB to -62 dB
    • Digital Gain of DAC: 0, 6, 12, 18 dB
    • Power Up/Down Control for Each Module
    • 6-dB to -70-dB Gain for Analog Outputs
    • 30-dB to -12-dB Gain for Analog Inputs
    • 0/20 dB Selectable for Microphone Input
    • 0-dB to -21-dB Gain for Analog Mixing
    • Parameter Settings for ALC
    • Three-Band Tone Control and 3D Sound
    • High-Pass Filter: 4-, 120-, 240-Hz
    • Two-Stage Programmable Notch Filter
    • Analog Mixing Control
  • Pop-Noise Reduction Circuit
  • Short and Thermal Protection Circuit
  • Package: 5-mm × 5-mm QFN Pacakge
  • Operation Temperature Range: -40°C to 85°C
  • APPLICATIONS
    • Portable Audio Player, Cellular Phone
    • Video Camcorder, Digital Movie/Still Camera
    • PMP/DMB

The PCM3793A/94A is a low-power stereo CODEC designed for portable digital audio applications. The device integrates stereo digital speaker amplifier, headphone amplifier, line amplifier, line input, boost amplifier, microphone bias, programmable gain control, analog mixing, sound effects, and automatic level control (ALC). It is available in a small-footprint, 5-mm × 5-mm QFN package. The PCM3793A/94A supports right-justified, left-justified, I2S, and DSP formats, providing easy interfacing to audio DSP and decoder/encoder chips. Sampling rates up to 50 kHz are supported. The user-programmable functions are accessible through a two- or three-wire serial control port.

The PCM3793A/94A is a low-power stereo CODEC designed for portable digital audio applications. The device integrates stereo digital speaker amplifier, headphone amplifier, line amplifier, line input, boost amplifier, microphone bias, programmable gain control, analog mixing, sound effects, and automatic level control (ALC). It is available in a small-footprint, 5-mm × 5-mm QFN package. The PCM3793A/94A supports right-justified, left-justified, I2S, and DSP formats, providing easy interfacing to audio DSP and decoder/encoder chips. Sampling rates up to 50 kHz are supported. The user-programmable functions are accessible through a two- or three-wire serial control port.

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* Data sheet 16-Bit Low Power Stereo Audio CODEC w/Microphone Bias Headphone Digit Speakr Amp datasheet (Rev. A) 2007年 2月 5日

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