產品詳細資料

Technology family HC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -55 to 125 Rating Military
Technology family HC Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 16 135.3552 mm² 19.56 x 6.92 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current Inverting Outputs Drive up to 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • ’HC257 ...Typical tpd = 9 ns
  • ’HC258 ...Typical tpd = 12 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Provides Bus Interface from Multiple Sources in High-Performance Systems

  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current Inverting Outputs Drive up to 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • ’HC257 ...Typical tpd = 9 ns
  • ’HC258 ...Typical tpd = 12 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Provides Bus Interface from Multiple Sources in High-Performance Systems

These devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (G\) input is at a high logic level.

To ensure the high-impedance state during power up or power down, (G\) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are designed to multiplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (G\) input is at a high logic level.

To ensure the high-impedance state during power up or power down, (G\) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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類型 標題 日期
* Data sheet SN54HC257, SN54HC258, SN74HC257, SN74HC258 datasheet (Rev. B) 2003年 9月 15日
* SMD SN54HC257 SMD 85124012A 2016年 6月 21日
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996年 5月 1日
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
CDIP (J) 16 Ultra Librarian
LCCC (FK) 20 Ultra Librarian

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