SN54LS145
- Full Decoding of Input Logic
- SN54145, SN74145, and SN74LS145 Have
80-mS Sink-current Capability - All Outputs Are Off for Invalid
BCD Input Conditions - Low Power Dissipation of 'LS145 . . .
35 mW Typical
These monolithic BCD-to-decimal decoder/drivers consist of eight inverters and ten four-input NAND gates. The inverters are connected in pairs to make BCD input date available for decoding by the NAND gates. Full decoding of valid BCD input logic ensures that all outputs remain off for all invalid binary input conditions. These decoders feature high-performance,
n-p-n output transistors designed for use as indicator/relay drivers or as open-collector logic-circuit drivers. Each of the high-breakdown output transistors (15 volts) of the SN54145, SN74145, or SN74LS145 will sink up to 80 milliamperes of current. Each input is one Series 54/74 or Series 54LS/74LS standard load, respectively. Inputs and outputs are entirely compatible for use with TTL or DTL logic curciuts, and the outputs are compatible for interfacing with most MOS integrated circuits. Power dissipation is typically 215 milliwatts for the '145 and 35 milliwatts for the 'LS145.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | BCD to Decimal Decoders/Drivers datasheet (Rev. A) | 1974年 3月 1日 | |
* | SMD | SN54LS145 SMD 85084012A | 2016年 6月 21日 | |
Selection guide | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||
Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||
User guide | LOGIC Pocket Data Book (Rev. B) | 2007年 1月 16日 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 | ||
Application note | TI IBIS File Creation, Validation, and Distribution Processes | 2002年 8月 29日 | ||
Application note | Designing With Logic (Rev. C) | 1997年 6月 1日 | ||
Application note | Designing with the SN54/74LS123 (Rev. A) | 1997年 3月 1日 | ||
Application note | Input and Output Characteristics of Digital Integrated Circuits | 1996年 10月 1日 | ||
Application note | Live Insertion | 1996年 10月 1日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
CDIP (J) | 16 | Ultra Librarian |
CFP (W) | 16 | Ultra Librarian |
LCCC (FK) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點