SN74CB3Q16211
- Member of the Texas Instruments Widebus family
- High-bandwidth data path (up to 500 MHz(1))
- 5-V tolerant I/Os with device powered up or powered down
- Low and flat ON-state resistance (ron) characteristics over operating range (ron = 5 Ω typical)
- Rail-to-rail switching on data I/O ports
- 0-V to 5-V switching with 3.3-V VCC
- 0-V to 3.3-V switching with 2.5-V VCC
- Bidirectional data flow, with near-zero propagation delay
- Low input or output capacitance minimizes loading and signal distortion (Cio(OFF) = 4 pF typical)
- Fast switching frequency (f OE = 20 MHz maximum)
- Data and control inputs provide undershoot clamp diodes
- Low power consumption (ICC = 1 mA typical)
- VCC operating range from 2.3 V to 3.6 V
- Data I/Os support 0-V to 5-V signaling levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V)
- Control inputs can be driven by TTL or 5-V/3.3-V CMOS outputs
- Ioff supports partial-power-down mode operation
- Latch-up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
- Supports both digital and analog applications: PCI interface, differential signal interface, memory interleaving, bus isolation, low-distortion signal gating (1)
(1)For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families .
The SN74CB3Q16211 device is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q16211 device provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.
The SN74CB3Q16211 device is organized as two 12-bit bus switches with separate output-enable (1 OE, 2 OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 12-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SSOP (DL) | 56 | Ultra Librarian |
| TSSOP (DGG) | 56 | Ultra Librarian |
| TVSOP (DGV) | 56 | Ultra Librarian |
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- 材料內容
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