產品詳細資料

Configuration 3:1 Number of channels 12 Power supply voltage - single (V) 5 Protocols Analog Ron (typ) (Ω) 3 CON (typ) (pF) 18 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Undershoot protection Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 3:1 Number of channels 12 Power supply voltage - single (V) 5 Protocols Analog Ron (typ) (Ω) 3 CON (typ) (pF) 18 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Undershoot protection Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
SSOP (DL) 56 190.647 mm² 18.42 x 10.35 TSSOP (DGG) 56 113.4 mm² 14 x 8.1
  • Member of the Texas Instruments Widebus™ Family
  • Undershoot Protection for Off-Isolation on A and B Ports Up to –2 V
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low On-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion
       (Cio(OFF) = 5.5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption
       (ICC = 3 µA Max)
  • VCC Operating Range From 4 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Leveles (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • TTL-Compatible Control Inputs
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114--B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, USB Interface, Bus Isolation, Low-Distortion Signal Gating

Widebus is a trademark of Texas Instruments.

  • Member of the Texas Instruments Widebus™ Family
  • Undershoot Protection for Off-Isolation on A and B Ports Up to –2 V
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low On-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion
       (Cio(OFF) = 5.5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption
       (ICC = 3 µA Max)
  • VCC Operating Range From 4 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Leveles (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • TTL-Compatible Control Inputs
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114--B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, USB Interface, Bus Isolation, Low-Distortion Signal Gating

Widebus is a trademark of Texas Instruments.

The SN74CBT16214C is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT16214C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT16214C is a 12-bit 1-of-3 multiplexer/demultiplexer. The select (S0, S1, S2) inputs control the data path of each multiplexer/demultiplexer. When the multiplexer/demultiplexer is enabled, the A port is connected to the B port, allowing bidirectional data flow between ports. When the multiplexer/demultiplexer is disabled, a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, each select input should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN74CBT16214C is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT16214C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT16214C is a 12-bit 1-of-3 multiplexer/demultiplexer. The select (S0, S1, S2) inputs control the data path of each multiplexer/demultiplexer. When the multiplexer/demultiplexer is enabled, the A port is connected to the B port, allowing bidirectional data flow between ports. When the multiplexer/demultiplexer is disabled, a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, each select input should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

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類型 標題 日期
* Data sheet SN74CBT16214C datasheet (Rev. B) 2003年 10月 15日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C) PDF | HTML 2021年 11月 19日
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021年 1月 6日
Selection guide Little Logic Guide 2018 (Rev. G) 2018年 7月 6日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
More literature Digital Bus Switch Selection Guide (Rev. A) 2004年 11月 10日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note Bus FET Switch Solutions for Live Insertion Applications 2003年 2月 7日

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模擬型號

HSPICE Model for SN74CBT16214C

SCDJ019.ZIP (40 KB) - HSpice Model
模擬型號

SN74CBT16214C IBIS Model

SCDM033.ZIP (27 KB) - IBIS Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SSOP (DL) 56 Ultra Librarian
TSSOP (DGG) 56 Ultra Librarian

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