SN74HC253-Q1

Name: SN74HC253-Q1
Brand: TI
SKU: SN74HC253-Q1
Price: 0.203 USD

現行

具有 3 態輸出的汽車類雙 4 線路至 1 線路數據選擇器/多工器

立即訂購

產品規格表

document-pdfAcrobat Dual 4-Line to 1-Line Data Selector/Multiplexer With 3-State Outputs datasheet (Rev. A) (英文)

SN74HC253-Q1

現行

產品規格表

立即訂購

產品詳細資料

Technology family

HC

Function

Digital Multiplexer

Configuration

4:1

Number of channels

2

Operating temperature range (°C)

-40 to 125

Rating

Automotive

Technology family

HC

Function

Digital Multiplexer

Configuration

4:1

Number of channels

2

Operating temperature range (°C)

-40 to 125

Rating

Automotive

SOIC (D)

16

59.4 mm² 9.9 x 6

Qualified for Automotive Applications
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
3-State Version of ’HC153
Wide Operating Voltage Range of 2 V to 6 V
High-Current Inverting Outputs Drive Up To 15 LSTTL Loads
Low Power Consumption, 80-µA Max I_CC
Typical t_pd = 9 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Permit Multiplexing From n Lines to One Line
Perform Parallel-to-Serial Conversion

Qualified for Automotive Applications
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
3-State Version of ’HC153
Wide Operating Voltage Range of 2 V to 6 V
High-Current Inverting Outputs Drive Up To 15 LSTTL Loads
Low Power Consumption, 80-µA Max I_CC
Typical t_pd = 9 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Permit Multiplexing From n Lines to One Line
Perform Parallel-to-Serial Conversion

Each data selector/multiplexer contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.

The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (in the high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each output has its own output-enable (OE) input. The outputs are disabled when their respective OE is high.

Each data selector/multiplexer contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.

The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the common outputs disabled (in the high-impedance state), the low impedance of the single enabled output drives the bus line to a high or low logic level. Each output has its own output-enable (OE) input. The outputs are disabled when their respective OE is high.

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	類型	標題	日期
*	Data sheet	Dual 4-Line to 1-Line Data Selector/Multiplexer With 3-State Outputs datasheet (Rev. A)	2008年 4月 15日
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)	2021年 7月 26日
	Selection guide	Logic Guide (Rev. AB)	2017年 6月 12日
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	2015年 12月 2日
	More literature	Automotive Logic Devices Brochure	2014年 8月 27日
	User guide	LOGIC Pocket Data Book (Rev. B)	2007年 1月 16日
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	2004年 7月 8日
	User guide	Signal Switch Data Book (Rev. A)	2003年 11月 14日
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	2002年 8月 29日
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)	1997年 6月 1日
	Application note	Designing With Logic (Rev. C)	1997年 6月 1日
	Application note	Input and Output Characteristics of Digital Integrated Circuits	1996年 10月 1日
	Application note	Live Insertion	1996年 10月 1日
	Application note	SN54/74HCT CMOS Logic Family Applications and Restrictions	1996年 5月 1日
	Application note	Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc	1996年 4月 1日

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SN74HC253-Q1

具有 3 態輸出的汽車類雙 4 線路至 1 線路數據選擇器/多工器

SN74HC253-Q1

產品詳細資料

技術文件

設計與開發

14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組

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