SN74HC4066 不建議用於新設計
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SN74AHC4066 現行 5-V、1:1 (SPST)、4 通道通用型類比開關 Smaller package options available

產品詳細資料

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 30 CON (typ) (pF) 3 ON-state leakage current (max) (µA) 5 Supply current (typ) (µA) 2 Bandwidth (MHz) 30 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 6
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 30 CON (typ) (pF) 3 ON-state leakage current (max) (µA) 5 Supply current (typ) (µA) 2 Bandwidth (MHz) 30 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 6
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOP (NS) 14 79.56 mm² 10.2 x 7.8 SSOP (DB) 14 48.36 mm² 6.2 x 7.8
  • Wide operating voltage range of 1V to 6V
  • Typical switch enable time of 18ns
  • Low power consumption, 20µA maximum ICC
  • Low input current of 1µA maximum
  • High degree of linearity
  • High on-off output-voltage ratio
  • Low crosstalk between switches
  • Low on-state impedance: 50Ω typical at VCC = 6V
  • Individual switch controls
  • Wide operating voltage range of 1V to 6V
  • Typical switch enable time of 18ns
  • Low power consumption, 20µA maximum ICC
  • Low input current of 1µA maximum
  • High degree of linearity
  • High on-off output-voltage ratio
  • Low crosstalk between switches
  • Low on-state impedance: 50Ω typical at VCC = 6V
  • Individual switch controls

The SN74HC4066 device is a silicon-gate CMOS quadruple analog switch designed to handle both analog and digital signals. Each switch permits signals with amplitudes of up to 6V (peak) to be transmitted in either direction.

Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

The SN74HC4066 device is a silicon-gate CMOS quadruple analog switch designed to handle both analog and digital signals. Each switch permits signals with amplitudes of up to 6V (peak) to be transmitted in either direction.

Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

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技術文件

star =TI 所選的此產品重要文件
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類型 標題 日期
* Data sheet SN74HC4066 Quadruple Bilateral Analog Switch datasheet (Rev. K) PDF | HTML 2024年 2月 9日
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 2024年 4月 30日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996年 5月 1日
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

介面轉接器

LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

使用指南: PDF
TI.com 無法提供
封裝 針腳 CAD 符號、佔位空間與 3D 模型
PDIP (N) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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