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TMUX1308 現行 具有 1.8-V 邏輯控制的 5-V、8:1、1 通道通用型多工器 Lower Ron

產品詳細資料

Configuration 2:1 SPDT Number of channels 3 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 23 CON (typ) (pF) 8.2 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 50 Operating temperature range (°C) -40 to 105 Input/output continuous current (max) (mA) 25 Rating HiRel Enhanced Product Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 2:1 SPDT Number of channels 3 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 23 CON (typ) (pF) 8.2 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 50 Operating temperature range (°C) -40 to 105 Input/output continuous current (max) (mA) 25 Rating HiRel Enhanced Product Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 105°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 5.5-V VCC Operation
  • Supports Mixed-Mode Voltage Operation on All Ports
  • High On-Off Output-Voltage Ratio
  • Low Crosstalk Between Switches
  • Individual Switch Controls
  • Extremely Low Input Current
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 105°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 5.5-V VCC Operation
  • Supports Mixed-Mode Voltage Operation on All Ports
  • High On-Off Output-Voltage Ratio
  • Low Crosstalk Between Switches
  • Individual Switch Controls
  • Extremely Low Input Current
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

This triple 2-channel CMOS analog multiplexer/demultiplexer is designed for 2-V to 5.5-V VCC operation.

The SN74LV4053A handles both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

This triple 2-channel CMOS analog multiplexer/demultiplexer is designed for 2-V to 5.5-V VCC operation.

The SN74LV4053A handles both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

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類型 標題 日期
* Data sheet SN74LV4053A-EP datasheet (Rev. C) 2004年 5月 11日

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