產品詳細資料

Resolution (Bits) 10 Sample rate (max) (ksps) 164 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 10 Analog supply (min) (V) 4.75 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.75 Digital supply (max) (V) 5.5
Resolution (Bits) 10 Sample rate (max) (ksps) 164 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 10 Analog supply (min) (V) 4.75 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.75 Digital supply (max) (V) 5.5
PLCC (FN) 28 155.0025 mm² 12.45 x 12.45 SOIC (DW) 24 159.65 mm² 15.5 x 10.3
  • Power Dissipation...40 mW Max
  • Advanced LinEPIC™ Single-Poly Process Provides Close Capacitor Matching for Better Accuracy
  • Fast Parallel Processing for DSP and µP Interface
  • Either External or Internal Clock Can Be Used
  • Conversion Time...6 µs
  • Total Unadjusted Error...±1 LSB Max
  • CMOS Technology

Advanced LinEPIC is a trademark of Texas Instruments.

  • Power Dissipation...40 mW Max
  • Advanced LinEPIC™ Single-Poly Process Provides Close Capacitor Matching for Better Accuracy
  • Fast Parallel Processing for DSP and µP Interface
  • Either External or Internal Clock Can Be Used
  • Conversion Time...6 µs
  • Total Unadjusted Error...±1 LSB Max
  • CMOS Technology

Advanced LinEPIC is a trademark of Texas Instruments.

The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.

The TLC1550I and TLC1551I are characterized for operation from –40°C to 85°C. The TLC1550M is characterized over the full military range of –55°C to 125°C.

The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.

The TLC1550I and TLC1551I are characterized for operation from –40°C to 85°C. The TLC1550M is characterized over the full military range of –55°C to 125°C.

下載

您可能會感興趣的類似產品

open-in-new 比較替代產品
功能相同,但引腳輸出與所比較的裝置不同
ADS8504 現行 具有平行介面 2.5V 內部參考的 12 位元 250kHz CMOS 類比轉數位轉換器 Higher resolution (12 bit), higher sampling rate (250 kSPS)

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
類型 標題 日期
* Data sheet 10-Bit Analog-to-Digital Converters With Parallel Outputs datasheet (Rev. G) 2003年 10月 30日

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​