產品詳細資料

Sampling rate (max) (kHz) 192 Control interface I2C Architecture Class-D Operating temperature range (°C) -40 to 85 Rating Catalog
Sampling rate (max) (kHz) 192 Control interface I2C Architecture Class-D Operating temperature range (°C) -40 to 85 Rating Catalog
VQFN (RHB) 32 25 mm² 5 x 5
  • Stereo Audio DAC With 95-dB SNR
  • Supports 8-kHz to 192-kHz Sample Rates
  • Stereo 1.29-W Class-D BTL 8-Ω Speaker Driver With Direct Battery Connection
  • 25 Built-In Processing Blocks (PRB_P1 – PRB_P25) Providing Biquad Filters, DRC, and 3D
  • Digital Sine-Wave Generator for Beeps and Key-Clicks (PRB_P25)
  • User-Programmable Biquad and FIR Filters
  • Two Single-Ended Inputs With Mixing and Output Level Control
  • Stereo Headphone or Lineout and Class-D Speaker Outputs Available
  • Microphone Bias
  • Headphone Detection
  • Digital Mixing Capability
  • Pin Control or Register Control for Digital-Playback Volume-Control Settings
  • Programmable PLL for Flexible Clock Generation
  • I2S, Left-Justified, Right-Justified, DSP, and TDM Audio Interfaces
  • I2C Control With Register Auto-Increment
  • Full Power-Down Control
  • Power Supplies:
    • Analog: 2.7 V–3.6 V
    • Digital Core: 1.65 V–1.95 V
    • Digital I/O: 1.1 V–3.6 V
    • Class-D: 2.7 V–5.5 V (SPLVDD and SPRVDD ≥ AVDD)
  • 5-mm × 5-mm 32-QFN Package
  • Stereo Audio DAC With 95-dB SNR
  • Supports 8-kHz to 192-kHz Sample Rates
  • Stereo 1.29-W Class-D BTL 8-Ω Speaker Driver With Direct Battery Connection
  • 25 Built-In Processing Blocks (PRB_P1 – PRB_P25) Providing Biquad Filters, DRC, and 3D
  • Digital Sine-Wave Generator for Beeps and Key-Clicks (PRB_P25)
  • User-Programmable Biquad and FIR Filters
  • Two Single-Ended Inputs With Mixing and Output Level Control
  • Stereo Headphone or Lineout and Class-D Speaker Outputs Available
  • Microphone Bias
  • Headphone Detection
  • Digital Mixing Capability
  • Pin Control or Register Control for Digital-Playback Volume-Control Settings
  • Programmable PLL for Flexible Clock Generation
  • I2S, Left-Justified, Right-Justified, DSP, and TDM Audio Interfaces
  • I2C Control With Register Auto-Increment
  • Full Power-Down Control
  • Power Supplies:
    • Analog: 2.7 V–3.6 V
    • Digital Core: 1.65 V–1.95 V
    • Digital I/O: 1.1 V–3.6 V
    • Class-D: 2.7 V–5.5 V (SPLVDD and SPRVDD ≥ AVDD)
  • 5-mm × 5-mm 32-QFN Package

The TLV320DAC3101 device is a low-power, highly integrated, high-performance DAC with selectable digital audio processing blocks and 24-bit stereo playback.

The device integrates headphone drivers and speaker drivers. The TLV320DAC3101 device has a suite of built-in processing blocks for digital audio processing. The digital audio data format is programmable to work with popular audio standard protocols (I2S, left-justified, and right-justified) in master, slave, DSP, and TDM modes. Bass boost, treble, or EQ is supported by the programmable digital signal-processing block. An on-chip PLL provides the high-speed clock needed by the digital signal-processing block. The volume level is controlled by either pin control or by register control. The audio functions are controlled using the I2C serial bus.

The TLV320DAC3101 device has a programmable digital sine-wave generator and is available in a 32-pin QFN package.

The TLV320DAC3101 device is a low-power, highly integrated, high-performance DAC with selectable digital audio processing blocks and 24-bit stereo playback.

The device integrates headphone drivers and speaker drivers. The TLV320DAC3101 device has a suite of built-in processing blocks for digital audio processing. The digital audio data format is programmable to work with popular audio standard protocols (I2S, left-justified, and right-justified) in master, slave, DSP, and TDM modes. Bass boost, treble, or EQ is supported by the programmable digital signal-processing block. An on-chip PLL provides the high-speed clock needed by the digital signal-processing block. The volume level is controlled by either pin control or by register control. The audio functions are controlled using the I2C serial bus.

The TLV320DAC3101 device has a programmable digital sine-wave generator and is available in a 32-pin QFN package.

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類型 標題 日期
* Data sheet Low-Power Stereo Audio DAC With Audio Processing and Stereo Class-D Speaker Amplifier datasheet (Rev. B) PDF | HTML 2018年 10月 4日
Application note Audio Serial Interface Configurations for Audio Codecs (Rev. A) 2019年 6月 27日
Application note TLV320AIC31xx and TLV320DAC31xx Power Consumption Characterization (Rev. B) 2014年 9月 3日
Application note Coefficient RAM Access Mechanisms.. (Rev. D) 2012年 1月 25日
Application note Audio Serial Interface Configurations for Audio Codecs 2010年 9月 22日
Application note Interfacing an I2S Device to an MSP430 Device (Rev. A) 2010年 3月 22日
EVM User's guide ACEV-1A EVM User's Guide 2009年 12月 17日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TLV320DAC3101EVM-U — TLV320DAC3101EVM-U 評估模組

The TLV320DAC3101EVM-U (ACEV-1A) is a complete evaluation module for the TLV320DAC3101 audio DAC.

The EVM is supported by TI’s CodecControl software, a block-diagram based graphical user interface for TI audio codecs.

The TLV320DAC3101EVM-U connects to a USB port of a PC. The USB interface provides (...)

使用指南: PDF
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驅動程式或資料庫

TLV320DAC31XX-DRIVERS — TLV320DAC31XX DAC 系列 Linux 驅動程式支援

These Linux drivers support our low-power audio digital-to-analog converters (DACs) in the TLV320DAC31xx device family, and include both .c and .h files. The "Go to third party" buttons below will allow you to downlod the appropriate drivers from git.kernal.org.

Linux main line status
Available in (...)
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RHB) 32 Ultra Librarian

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