產品詳細資料

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5, 12 Protocols Analog Ron (typ) (Ω) 6.5 CON (typ) (pF) 19 ON-state leakage current (max) (µA) 0.01 Supply current (typ) (µA) 0.03 Bandwidth (MHz) 530 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 20 Rating Catalog Drain supply voltage (max) (V) 12 Supply voltage (max) (V) 12
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5, 12 Protocols Analog Ron (typ) (Ω) 6.5 CON (typ) (pF) 19 ON-state leakage current (max) (µA) 0.01 Supply current (typ) (µA) 0.03 Bandwidth (MHz) 530 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 20 Rating Catalog Drain supply voltage (max) (V) 12 Supply voltage (max) (V) 12
SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4
  • 2-V to 12-V Single-Supply Operation
  • Specified ON-State Resistance:
    • 15-Ω Maximum With 12-V Supply
    • 20-Ω Maximum With 5-V Supply
    • 50-Ω Maximum With 3.3-V Supply
  • ΔRON Matching
    • 2.5-Ω (Max) at 12 V
    • 3-Ω (Max) at 5 V
    • 3.5-Ω (Max) at 3.3 V
  • Specified Low OFF-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85°C
  • Specified Low ON-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85&25;C
  • Low Charge Injection: 11.5 pC (12-V Supply)
  • Fast Switching Speed:
    tON = 80 ns, tOFF = 50 ns
    (12-V Supply)
  • Break-Before-Make Operation (tON > tOFF)
  • TTL/CMOS-Logic Compatible With 5-V Supply
  • Available in 14-Pin TSSOP Package or 14-Pin
    SOIC Package
  • 2-V to 12-V Single-Supply Operation
  • Specified ON-State Resistance:
    • 15-Ω Maximum With 12-V Supply
    • 20-Ω Maximum With 5-V Supply
    • 50-Ω Maximum With 3.3-V Supply
  • ΔRON Matching
    • 2.5-Ω (Max) at 12 V
    • 3-Ω (Max) at 5 V
    • 3.5-Ω (Max) at 3.3 V
  • Specified Low OFF-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85°C
  • Specified Low ON-Leakage Currents:
    • 1 nA at 25°C
    • 10 nA at 85&25;C
  • Low Charge Injection: 11.5 pC (12-V Supply)
  • Fast Switching Speed:
    tON = 80 ns, tOFF = 50 ns
    (12-V Supply)
  • Break-Before-Make Operation (tON > tOFF)
  • TTL/CMOS-Logic Compatible With 5-V Supply
  • Available in 14-Pin TSSOP Package or 14-Pin
    SOIC Package

The TS12A44513, TS12A44514, and TS12A44515 devices have four bidirectional single-pole single-throw (SPST) single-supply CMOS analog switches. The TS12A44513 has two normally closed (NC) switches and two normally open (NO) switches, the TS12A44514 has four NO switches, and the TS12A44515 has four NC switches.

These CMOS switches may operate continuously with a single supply from 2 V to 12 V and can handle rail-to-rail analog signals. The OFF-leakage current maximum is only 1 nA at 25°C or 10 nA at 85°C.

When using a 5-V supply, all digital inputs have 0.8-V to 2.4-V logic thresholds, ensuring TTL/CMOS-logic compatibility.

The TS12A44513, TS12A44514, and TS12A44515 devices have four bidirectional single-pole single-throw (SPST) single-supply CMOS analog switches. The TS12A44513 has two normally closed (NC) switches and two normally open (NO) switches, the TS12A44514 has four NO switches, and the TS12A44515 has four NC switches.

These CMOS switches may operate continuously with a single supply from 2 V to 12 V and can handle rail-to-rail analog signals. The OFF-leakage current maximum is only 1 nA at 25°C or 10 nA at 85°C.

When using a 5-V supply, all digital inputs have 0.8-V to 2.4-V logic thresholds, ensuring TTL/CMOS-logic compatibility.

下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
功能相同,但引腳輸出與所比較的裝置不同
TMUX6212 現行 具 1.8-V 邏輯控制的 36-V 低 RON、1:1、4 通道、多工器 Pin-to-pin upgrade with higher supply voltage support

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 5
類型 標題 日期
* Data sheet TS12A4451x Low ON-State Resistance 4-Channel SPST CMOS Analog Switches datasheet (Rev. B) PDF | HTML 2016年 2月 1日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note Preventing Excess Power Consumption on Analog Switches 2008年 7月 3日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

介面轉接器

LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

使用指南: PDF
TI.com 無法提供
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片