TS12A4517
- ±1-V to ±6-V Dual-Supply Operation
- Specified ON-State Resistance:
- 25 Max With ±5-V Supply
- 35 Max With ±3.3-V Supply
- 47 Max With ±1.8-V Supply
- Specified Low OFF-Leakage Currents:
- 5 nA at 25°C
- 10 nA at 85°C
- Specified Low ON-Leakage Currents:
- 5 nA at 25°C
- 10 nA at 85°C
- Low Charge Injection: 13 pC (±5-V Supply)
- Fast Switching Speed:
tON = 85 ns, tOFF = 50 ns (±5-V Supply) - Break-Before-Make Operation (tON > tOFF)
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2500-V Human-Body Model (A114-F)
- 1000-V Charged-Device Model (C101-C)
- 250-V Machine Model (A115-A)
The TS12A4516/TS12A4517 are single pole/single throw (SPST), low-voltage, dual-supply CMOS analog switches, with very low switch ON-state resistance. The TS12A4516 is normally open (NO). The TS12A4517 is normally closed (NC).
These CMOS switches can operate continuously with a dual supplies between ±1 V and ±6 V [(2 V < (V+ V) < 12 V]. Each switch can handle rail-to-rail analog signals. The OFF-leakage current maximum is only 5 nA at 25°C or 10 nA at 85°C.
For pin-compatible parts for use with single supply, see the TS12A4514/TS12A4515.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | Dual-Supply Low ON-State Resistance SPST CMOS Analog Switches datasheet (Rev. B) | 2009年 4月 14日 | |
Application note | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022年 6月 2日 | |
Application note | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021年 12月 1日 | |
Application note | Preventing Excess Power Consumption on Analog Switches | 2008年 7月 3日 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
DIP-ADAPTER-EVM — DIP 轉接器評估模組
Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.
The (...)
LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 8 | Ultra Librarian |
SOT-23 (DBV) | 5 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。