TS3DS10224
- Can be configured for
- Differential Crosspoint Switching
- Differential Single Channel 1:4 Multiplexer and Demultiplexer
- Differential 2-Channel 1:2 Multiplexer and Demultiplexer
- Differential Fan-Out of Signal Pair to Two Ports Simultaneously
- Bidirectional Operation
- Fail-Safe Protection: IOFF Protection Prevents Current Leakage in Powered-Down State
(VCC = 0 V) - High BW (1.2 GHz Typical)
- Low RON and CON:
- 13-Ω RON Typical
- 9-pF CON Typical
- ESD Performance (I/O Pins)
- ±8-kV Contact Discharge (IEC61000-4-2)
- 2-kV Human-Body Model per JESD22-A114E (to GND)
- ESD Performance (All Pins)
- 2-kV Human-Body Model per JESD22-A114E
- Small WQFN package (3.00 mm × 3.00 mm,
0.4-mm pitch)
The TS3DS10224 device is a bidirectional differential crosspoint, 1:4, or 1:2 multiplexer and demultiplexer; or fan-out switch for high-speed differential signal applications (up to 720 Mbps). The TS3DS10224 logic table can route any input to any output creating a wide range of possible switching or multiplexing configurations. Common configurations include: differential crosspoint switching, differential 1:4 mux, or differential 2-channel 1:2 multiplexer and demultiplexer. The TS3DS10224 offers a high BW of 1.2 GHz with channel RON of 13 Ω (typical).
The TS3DS10224 can also be used to fan out a differential signal pair to two ports simultaneously (fan-out configuration). The BW performance is lower in this configuration.
The TS3DS10224 operates with a 3-V to 3.6-V power supply. It features ESD protection of up to ±8-kV contact discharge and 2-kV human-body model on its I/O pins.
The TS3DS10224 provides fail-safe protection by isolating the I/O pins with high impedance when the power supply (VCC) is not present.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TS3DS10224 High-Speed Differential Crosspoint, 1:4 Differential Multiplexer and Demultiplexer, 2 Channel Differential 1:2 Multiplexer and Demultiplexer, or Fan-Out Switch datasheet (Rev. E) | PDF | HTML | 2019年 10月 17日 |
Application note | Preventing Excess Power Consumption on Analog Switches | 2008年 7月 3日 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 |
設計與開發
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LEADLESS-ADAPTER1 — 用於測試 TI 的 6、8、10、12、14、16 和 20 針腳無引線封裝的表面貼裝至 DIP 接頭適配器
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
WQFN (RUK) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。