SLUAAM7A december 2022 – july 2023 TPS561201 , TPS561208 , TPS561243 , TPS561246 , TPS562201 , TPS562208 , TPS562243 , TPS562246 , TPS563201 , TPS563208 , TPS563252 , TPS563257 , TPS564201 , TPS564208 , TPS564242 , TPS564247 , TPS564252 , TPS564255 , TPS564257 , TPS565201 , TPS565208 , TPS565242 , TPS565247 , TPS566242 , TPS566247
This topic gives experimental verification of Type 2 co-layout design. The BOM of the co-layout board is the same as TI EVM board.
Figure 5-1 and Figure 5-2 show the board layout for the co-layout design.
Efficiency comparison between EVM and co-layout board which are tested at 1.05 Vout and 5 Vout are shown in Table 5-1. From the effciency results, it shows that the efficiency of co-layout board is slightly lower than EVM board.
Vout (V) | Efficiency | Vout (V) | Efficiency | |
---|---|---|---|---|
TPS565242 EVM board | 1.05 | 84.2% | 5 | 94.8% |
TPS565242 Co-lay board | 1.05 | 83.5% | 5 | 94.4% |
TPS565201 EVM board | 1.05 | 77.3% | 5 | 92.3% |
TPS565201 Co-lay board | 1.05 | 77.0% | 5 | 92.2% |
Switching spike voltage comparison between EVM and co-layout board which are tested at 1.05 Vout are shown in Table 5-2. From the switching spike results, it shows that co-layout board is slightly worse than EVM board.
Vin (V) | Vout (V) | Iout (A) | Switching spike voltage (V) | |
---|---|---|---|---|
TPS565242 EVM board | 12 | 1.05 | 5 | 12.0 |
TPS565242 Co-lay board | 12 | 1.05 | 5 | 12.4 |
TPS565201 EVM board | 12 | 1.05 | 5 | 13.2 |
TPS565201 Co-lay board | 12 | 1.05 | 5 | 14.7 |
Figure 5-15 and Figure 5-12 shows the co-layout board with TPS565242 transient response with 0.1 A to 2.5 A and 1.25 A to 3.75 A. The current steps slew rate is set as 0.8 A/us.