SLAT163 July   2024 AFE43902-Q1 , AFE439A2 , AFE53902-Q1 , AFE539A4 , AFE539F1-Q1 , AFE639D2 , DAC43204 , DAC43401 , DAC43401-Q1 , DAC43701 , DAC43701-Q1 , DAC43901-Q1 , DAC43902-Q1 , DAC53001 , DAC53002 , DAC53004 , DAC53004W , DAC53202 , DAC53204 , DAC53204-Q1 , DAC53204W , DAC53401 , DAC53401-Q1 , DAC53701-Q1 , DAC539E4W , DAC539G2-Q1 , DAC63001 , DAC63002 , DAC63004 , DAC63004W , DAC63202 , DAC63202W , DAC63204 , DAC63204-Q1 , DAC63204W

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1What is a Smart DAC?
  5. 2What is a Smart Analog Front End (AFE)?
  6. 3Smart DAC selection guide
  7. 4Smart AFE Selection Guide
  8. 5Applications
    1. 5.1 Lightning
      1. 5.1.1 Light Emitting Diode (LED) Biasing and Linear Fade-In Fade-Out
      2. 5.1.2 LED Biasing With LED Driver
      3. 5.1.3 Analog Thermal Foldback
        1. 5.1.3.1 Single Slope Thermal Foldback
        2. 5.1.3.2 Multi-Slope Thermal Foldback
      4. 5.1.4 Logarithmic Fade-In/Fade-Out
      5. 5.1.5 LED Sequencing
    2. 5.2 Control
      1. 5.2.1 Voltage Margining and Scaling With Voltage Output Smart DAC
      2. 5.2.2 Thermoelectric Cooling (TEC) Control
        1. 5.2.2.1 TEC Control Using DC/DC Driver
        2. 5.2.2.2 TEC control using h-Bridge driver
      3. 5.2.3 Analog Power Control (APC) of a Laser
      4. 5.2.4 Constant Power Control
    3. 5.3 Microcontroller Independent Fault Management and Communication
      1. 5.3.1 Programmable Comparator Using Smart DAC
      2. 5.3.2 GPI-to-PWM
      3. 5.3.3 If-Then-Else Logic
    4. 5.4 Driver
      1. 5.4.1 Lens Positioning Control for Camera Module Auto-Focus and Image Stabilization
      2. 5.4.2 Laser Drive
    5. 5.5 Miscellaneous Smart DAC Applications
      1. 5.5.1 Software-less Medical Alarm Generation
      2. 5.5.2 555 Timer

5.2.1 Voltage Margining and Scaling With Voltage Output Smart DAC

Adjustable power supplies, such as low dropout regulators (LDOs), DC/DC converters, or SMPS provide a feedback (FB) input that is used to control the desired output of the power supply. Smart DAC is an excellent design to control such systems. Non-volatile memory stores the power-on voltage level which along with true Hi-Z power down (even when VDD is off) capability eliminates the need for power-up sequencing and maintains predictable power-on. In addition, 2 voltage levels (margin-high and margin-low) can be stored in the non-volatile memory and can be triggered between each other with the GPI pin. The device also has a slew-rate control feature, allowing for a configurable voltage ramp up to eliminate power supply glitches. Smart DACs also offer programmable current output capability for current voltage margining.

Table 5-7 Design Implementation
Hardware Block Diagram Figure 5-7 Hardware Block Diagram
Design Benefits Suggested device
  • High-Z output
  • Slew rate control for glitch free margining
  • EEPROM that store margin high and margin low voltage levels
  • GPIO
  • Non-volatile memory to store all configurations
End Equipment Design help