CY74FCT827T

Name: CY74FCT827T
Brand: TI
SKU: CY74FCT827T
Price: 0.453 USD

AKTIV

10-Kanal-Puffer, 4,75 bis 5,25 V mit TTL-kompatiblen CMOS-Eingängen und Tri-State-Ausgängen

Jetzt bestellen

Datenblatt

document-pdfAcrobat 10-Bit Buffers With 3-State Outputs datasheet (Rev. A) (Englisch)

CY74FCT827T

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Technology family

FCT

Supply voltage (min) (V)

4.75

Supply voltage (max) (V)

5.25

Number of channels

10

IOL (max) (mA)

64

Supply current (max) (µA)

500

IOH (max) (mA)

-32

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

FCT

Supply voltage (min) (V)

4.75

Supply voltage (max) (V)

5.25

Number of channels

10

IOL (max) (mA)

64

Supply current (max) (µA)

500

IOH (max) (mA)

-32

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SOIC (DW)

24

159.65 mm² 15.5 x 10.3

SSOP (DBQ)

24

51.9 mm² 8.65 x 6

Function, Pinout, and Drive Compatible With FCT, F, and AM29827 Logic
Reduced V_OH (Typically = 3.3 V) Versions of Equivalent FCT Functions
Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
I_off Supports Partial-Power-Down Mode Operation
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
3-State Outputs
Matched Rise and Fall Times
Fully Compatible With TTL Input and Output Logic Levels
CY54FCT827T
- 32-mA Output Sink Current
- 12-mA Output Source Current
CY74FCT827T
- 64-mA Output Sink Current
- 32-mA Output Source Current

Function, Pinout, and Drive Compatible With FCT, F, and AM29827 Logic
Reduced V_OH (Typically = 3.3 V) Versions of Equivalent FCT Functions
Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
I_off Supports Partial-Power-Down Mode Operation
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
3-State Outputs
Matched Rise and Fall Times
Fully Compatible With TTL Input and Output Logic Levels
CY54FCT827T
- 32-mA Output Sink Current
- 12-mA Output Source Current
CY74FCT827T
- 64-mA Output Sink Current
- 32-mA Output Source Current

The \x92FCT827T devices are 10-bit bus drivers that provide high-performance bus-interface buffering for wide data/address paths or buses carrying parity. The 10-bit buffers have NANDed output enables for maximum control flexibility. The \x92FCT827T devices are designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. All outputs are designed for low-capacitance bus loading in the high-impedance state.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The \x92FCT827T devices are 10-bit bus drivers that provide high-performance bus-interface buffering for wide data/address paths or buses carrying parity. The 10-bit buffers have NANDed output enables for maximum control flexibility. The \x92FCT827T devices are designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. All outputs are designed for low-capacitance bus loading in the high-impedance state.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

filter

Andere Nicht invertierende Puffer & Treiber suchen

Herunterladen Video mit Transkript ansehen Video

Alle anzeigen 8

	Typ	Titel	Datum
*	Data sheet	10-Bit Buffers With 3-State Outputs datasheet (Rev. A)	01 Okt 2001
	Selection guide	Logic Guide (Rev. AB)	12 Jun 2017
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	02 Dez 2015
	User guide	LOGIC Pocket Data Book (Rev. B)	16 Jan 2007
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	08 Jul 2004
	Application note	Selecting the Right Level Translation Solution (Rev. A)	22 Jun 2004
	User guide	CYFCT Parameter Measurement Information	02 Apr 2001
	Selection guide	Advanced Bus Interface Logic Selection Guide	09 Jan 2001

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

14-24-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14-polige bis 24-polige D-, DB-, DGV-, DW-, DYY-, NS-

Das 14-24-LOGIC-EVM-Evaluierungsmodul (EVM) ist für die Unterstützung aller Logikgeräte konzipiert, die sich in einem 14-Pin- bis 24-Pin-D-, DW-, DB-, NS-, PW-, DYY- oder DGV-Gehäuse befinden.

Benutzerhandbuch: PDF | HTML

Nicht verfügbar auf TI.com

Simulationsmodell

CY74FCT827T Behavioral SPICE Model

SCCM016.ZIP (7 KB) - PSpice Model

Herunterladen

Gehäuse	Pins	CAD-Symbole, Footprints und 3D-Modelle
SOIC (DW)	24	Ultra Librarian
SSOP (DBQ)	24	Ultra Librarian

Es gelten die allgemeinen Geschäftsbedingungen von TI für Evaluierungsartikel.

CY74FCT827T

10-Kanal-Puffer, 4,75 bis 5,25 V mit TTL-kompatiblen CMOS-Eingängen und Tri-State-Ausgängen

CY74FCT827T

Produktdetails

Ähnliche Produkte, die für Sie interessant sein könnten

Selbe Funktionalität wie der verglichene Baustein bei gleicher Anschlussbelegung

Ähnliche Funktionalität wie verglichener Baustein

Technische Dokumentation

Design und Entwicklung

14-24-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14-polige bis 24-polige D-, DB-, DGV-, DW-, DYY-, NS-

CY74FCT827T Behavioral SPICE Model

Bestellen & Qualität

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Videoreihe

Videos