The TLC5618 is a dual 12-bit voltage output digital-to-analog converter (DAC) with buffered reference inputs (high impedance). The DACs
have an output voltage range that is two times the reference voltage, and the DACs are monotonic. The device is simple to use, running from a single
supply of 5 V. A power-on reset function is incorporated in the device to ensure repeatable start-up conditions.
Digital control of the TLC5618 is over a 3-wire CMOS-compatible serial bus. The device receives a 16-bit word for programming and
producing the analog output. The digital inputs feature Schmitt triggers for high noise immunity. Digital communication protocols include the
SPI, QSPI, and Microwire standards.
Two versions of the device are available. The TLC5618 does not have an internal state machine and is dependent on all external timing signals. The TLC5618A has an internal state machine that counts the
number of clocks from the falling edge of CS\ and then updates and disables the device from accepting further
data inputs. The TLC5618A is recommended for TMS320 and SPI processors, and the TLC5618 is
recommended only for SPI or 3-wire serial port processors. The TLC5618A is backward-compatible and
designed to work in TLC5618 designed systems.
The 8-terminal small-outline D package allows digital control of analog functions in space-critical applications.
The TLC5618C is characterized for operation from 0°C to 70°C. The TLC5618I is characterized for operation
from \x9640°C to 85°C. The TLC5618Q is characterized for operation from \x9640°C to 125°C. The TLC5618M is
characterized for operation from \x9655°C to 125°C.
The TLC5618 is a dual 12-bit voltage output digital-to-analog converter (DAC) with buffered reference inputs (high impedance). The DACs
have an output voltage range that is two times the reference voltage, and the DACs are monotonic. The device is simple to use, running from a single
supply of 5 V. A power-on reset function is incorporated in the device to ensure repeatable start-up conditions.
Digital control of the TLC5618 is over a 3-wire CMOS-compatible serial bus. The device receives a 16-bit word for programming and
producing the analog output. The digital inputs feature Schmitt triggers for high noise immunity. Digital communication protocols include the
SPI, QSPI, and Microwire standards.
Two versions of the device are available. The TLC5618 does not have an internal state machine and is dependent on all external timing signals. The TLC5618A has an internal state machine that counts the
number of clocks from the falling edge of CS\ and then updates and disables the device from accepting further
data inputs. The TLC5618A is recommended for TMS320 and SPI processors, and the TLC5618 is
recommended only for SPI or 3-wire serial port processors. The TLC5618A is backward-compatible and
designed to work in TLC5618 designed systems.
The 8-terminal small-outline D package allows digital control of analog functions in space-critical applications.
The TLC5618C is characterized for operation from 0°C to 70°C. The TLC5618I is characterized for operation
from \x9640°C to 85°C. The TLC5618Q is characterized for operation from \x9640°C to 125°C. The TLC5618M is
characterized for operation from \x9655°C to 125°C.