Detalles del producto

Technology family HCT Function Encoder Configuration 10:4 Number of channels 1 Operating temperature range (°C) -55 to 125 Rating Catalog
Technology family HCT Function Encoder Configuration 10:4 Number of channels 1 Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4
  • Buffered Inputs and Outputs
  • Typical Propagation Delay: 13ns at VCC = 5V, CL = 15pF, TA = 25°C
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range... –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

  • Buffered Inputs and Outputs
  • Typical Propagation Delay: 13ns at VCC = 5V, CL = 15pF, TA = 25°C
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range... –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

The ’HC147 and CD74HCT147 are high speed silicon-gate CMOS devices and are pin-compatible with low power Schottky TTL (LSTTL).

The ’HC147 and CD74HCT147 9-input priority encoders accept data from nine active LOW inputs (l1 to l9) and provide binary representation on the four active LOW inputs (Y0\ to Y3\). A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line l9 having the highest priority.

These devices provide the 10-line to 4-line priority encoding function by use of the implied decimal "zero". The "zero" is encoded when all nine data inputs are HIGH, forcing all four outputs HIGH.

The ’HC147 and CD74HCT147 are high speed silicon-gate CMOS devices and are pin-compatible with low power Schottky TTL (LSTTL).

The ’HC147 and CD74HCT147 9-input priority encoders accept data from nine active LOW inputs (l1 to l9) and provide binary representation on the four active LOW inputs (Y0\ to Y3\). A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line l9 having the highest priority.

These devices provide the 10-line to 4-line priority encoding function by use of the implied decimal "zero". The "zero" is encoded when all nine data inputs are HIGH, forcing all four outputs HIGH.

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Documentación técnica

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* Data sheet CD54HC147, CD74HC147, CD74HCT147 datasheet (Rev. F) 30 oct 2003

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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