Detalles del producto

Configuration 1:1 SPST Number of channels 24 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 5 CON (typ) (pF) 13 ON-state leakage current (max) (µA) 20 Bandwidth (MHz) 100 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Signal path translation Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 1:1 SPST Number of channels 24 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 5 CON (typ) (pF) 13 ON-state leakage current (max) (µA) 20 Bandwidth (MHz) 100 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Signal path translation Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
SSOP (DL) 56 190.647 mm² 18.42 x 10.35 TSSOP (DGG) 56 113.4 mm² 14 x 8.1 TVSOP (DGV) 56 72.32 mm² 11.3 x 6.4
  • Member of the Texas Instruments Widebus Family
  • Output Voltage Translation Tracks VCC
  • Supports Mixed-Mode Signal Operation on
    All Data I/O Ports
    • 5-V Input Down to 3.3-V Output Level
      Shift With 3.3-V VCC
    • 5-V/3.3-V Input Down to 2.5-V Output
      Level Shift With 2.5-V VCC
  • 5-V Tolerant I/Os With Device Powered Up
    or Powered Down
  • Bidirectional Data Flow With Near-Zero
    Propagation Delay
  • Low ON-State Resistance (ron) Characteristics
    (ron = 5 Ω Typ)
  • Low Input/Output Capacitance Minimizes
    Loading (Cio(OFF) = 5 pF Typ)
  • Data and Control Inputs Provide
    Undershoot Clamp Diodes
  • Low Power Consumption
    (ICC = 70 µA Max)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL
    or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Digital Applications: Level
    Translation, PCI Interface, Bus Isolation
  • Ideal for Low-Power Portable Equipment

  • Member of the Texas Instruments Widebus Family
  • Output Voltage Translation Tracks VCC
  • Supports Mixed-Mode Signal Operation on
    All Data I/O Ports
    • 5-V Input Down to 3.3-V Output Level
      Shift With 3.3-V VCC
    • 5-V/3.3-V Input Down to 2.5-V Output
      Level Shift With 2.5-V VCC
  • 5-V Tolerant I/Os With Device Powered Up
    or Powered Down
  • Bidirectional Data Flow With Near-Zero
    Propagation Delay
  • Low ON-State Resistance (ron) Characteristics
    (ron = 5 Ω Typ)
  • Low Input/Output Capacitance Minimizes
    Loading (Cio(OFF) = 5 pF Typ)
  • Data and Control Inputs Provide
    Undershoot Clamp Diodes
  • Low Power Consumption
    (ICC = 70 µA Max)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL
    or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Digital Applications: Level
    Translation, PCI Interface, Bus Isolation
  • Ideal for Low-Power Portable Equipment

The SN74CB3T16211 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T16211 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels.

The I/O port of this device has a pullup current source that maintains the output voltage at VCC when the device is ON, and the input is greater than or equal to VCC – 1. Because of the pullup current source, the output voltage level may be less than VCC when the operating frequency is low and the I/O port is connected to a pulldown resistor. In order to maintain the output voltage at VCC, a pullup resistor must be connected to VCC instead of a pulldown resistor to ground.

The SN74CB3T16211 is organized as two 12-bit bus switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 12-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CB3T16211 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T16211 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels.

The I/O port of this device has a pullup current source that maintains the output voltage at VCC when the device is ON, and the input is greater than or equal to VCC – 1. Because of the pullup current source, the output voltage level may be less than VCC when the operating frequency is low and the I/O port is connected to a pulldown resistor. In order to maintain the output voltage at VCC, a pullup resistor must be connected to VCC instead of a pulldown resistor to ground.

The SN74CB3T16211 is organized as two 12-bit bus switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 12-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Documentación técnica

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Tipo Título Fecha
* Data sheet SN74CB3T16211 datasheet (Rev. C) 17 ago 2012
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 dic 2021
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C) PDF | HTML 19 nov 2021
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 06 ene 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note How to Select Little Logic (Rev. A) 26 jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
More literature Digital Bus Switch Selection Guide (Rev. A) 10 nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 jun 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note Bus FET Switch Solutions for Live Insertion Applications 07 feb 2003

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

HSPICE Model for SN74CB3T16211

SCDJ036.ZIP (118 KB) - HSpice Model
Modelo de simulación

SN74CB3T16211 IBIS Model

SCDM096.ZIP (28 KB) - IBIS Model
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SSOP (DL) 56 Ultra Librarian
TSSOP (DGG) 56 Ultra Librarian
TVSOP (DGV) 56 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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