Información de empaque
| Encapsulado | Pines VQFN (RHB) | 32 |
| Rango de temperatura de funcionamiento (℃) -40 to 85 |
| Cant. de paquetes | Empresa de transporte 3,000 | LARGE T&R |
Características para TLV320AIC3100
- Stereo Audio DAC With 95-dB SNR
- Mono Audio ADC With 91-dB SNR
- Supports 8-kHz to 192-kHz Separate DAC and ADC Sample Rates
- Mono Class-D BTL Speaker Driver (2.5 W Into 4 Ω or 1.6 W Into 8 Ω)
- One Differential and Three Single-Ended Inputs With Mixing and Level Control
- Microphone With Bias, Preamp PGA, and AGC
- Built-In Digital Audio Processing Blocks (PRB) With User-Programmable Biquad and FIR Filters
- Digital Mixing Capability
- Programmable Digital Audio Processor for Bass Boost/Treble/EQ With up to Five Biquads for Record and up to Six Biquads for Playback
- Pin Control or Register Control for Digital-Playback Volume-Control Settings
- Digital Sine-Wave Generator for Beep
- Integrated PLL Used for Programmable Digital Audio Processor
- I2S, Left-Justified, Right-Justified, DSP, and TDM Audio Interfaces
- I2C Control With Register Auto-Increment
- Full Power-Down Control
- Power Supplies:
- Analog: 2.7 V–3.6 V
- Digital Core: 1.65 V–1.95 V
- Digital I/O: 1.1 V–3.6 V
- Class-D: 2.7 V–5.5 V (SPKVDD ≥ AVDD)
- 5-mm × 5-mm 32-QFN Package
Descripción de TLV320AIC3100
The TLV320AIC3100 is a low-power, highly integrated, high-performance codec which provides a stereo audio DAC, a mono audio ADC, and a mono class-D 4-Ω speaker driver.
The TLV320AIC3100 features a high-performance audio codec with 24-bit stereo playback and monaural record functionality. The device integrates several analog features, such as a microphone interface, headphone drivers, and speaker drivers. The TLV320AIC3100 has built-in digital audio processing blocks (PRB) for both the DAC and ADC paths. The digital audio data format is programmable to work with popular audio standard protocols (I2S, left/right-justified) in master, slave, DSP, and TDM modes. Bass boost, treble, or EQ can be supported by the programmable digital signal-processing block. An on-chip PLL provides the high-speed clock needed by the digital signal-processing block. The volume level can be controlled by either pin control or by register control. The audio functions are controlled using the I2C serial bus.
The TLV320AIC3100 has a programmable digital sine-wave generator and is available in a 32-pin QFN package.