SN54F138
- Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems
- Incorporates Three Enable Inputs to Simplify Cascading and/or Data Reception
- Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
The ´F138 is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of this decoder and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.
The SN54F138 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F138 is characterized for operation from 0°C to 70°C.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | 3-Line To 8-Line Decoders/Demultiplexers datasheet (Rev. B) | 1996/07/01 | |
| * | SMD | SN54F138 SMD 5962-97582 | 2016/06/21 | |
| Selection guide | Logic Guide (Rev. AB) | 2017/06/12 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015/12/02 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007/01/16 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 2002/08/29 | ||
| Application note | Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) | 1997/08/01 | ||
| Application note | Designing With Logic (Rev. C) | 1997/06/01 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 1996/10/01 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| CDIP (J) | 16 | Ultra Librarian |
| CFP (W) | 16 | Ultra Librarian |
| LCCC (FK) | 20 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치