SN74CBT16214C
- Member of the Texas Instruments Widebus™ Family
- Undershoot Protection for Off-Isolation on A and B Ports Up to –2 V
- Bidirectional Data Flow, With Near-Zero Propagation Delay
- Low On-State Resistance (ron) Characteristics (ron = 3 Typical)
- Low Input/Output Capacitance Minimizes Loading and Signal Distortion
(Cio(OFF) = 5.5 pF Typical) - Data and Control Inputs Provide Undershoot Clamp Diodes
- Low Power Consumption
(ICC = 3 µA Max) - VCC Operating Range From 4 V to 5.5 V
- Data I/Os Support 0 to 5-V Signaling Leveles (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
- Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
- Ioff Supports Partial-Power-Down Mode Operation
- TTL-Compatible Control Inputs
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114--B, Class II)
- 1000-V Charged-Device Model (C101)
- Supports Both Digital and Analog Applications: PCI Interface, USB Interface, Bus Isolation, Low-Distortion Signal Gating
Widebus is a trademark of Texas Instruments.
The SN74CBT16214C is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT16214C provides protection for undershoot up to 2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.
The SN74CBT16214C is a 12-bit 1-of-3 multiplexer/demultiplexer. The select (S0, S1, S2) inputs control the data path of each multiplexer/demultiplexer. When the multiplexer/demultiplexer is enabled, the A port is connected to the B port, allowing bidirectional data flow between ports. When the multiplexer/demultiplexer is disabled, a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, each select input should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
기술 자료
설계 및 개발
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패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
SSOP (DL) | 56 | Ultra Librarian |
TSSOP (DGG) | 56 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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