SN74CBTD3306C

Name: SN74CBTD3306C
Brand: TI
SKU: SN74CBTD3306C
Price: 0.325 USD

활성

-2V 언더슈트 보호 및 레벨 전환(액티브 로우) 기능을 지원하는 5V, 1:1(SPST), 2채널 버스 스위치

지금 주문

데이터 시트

document-pdfAcrobat SN74CBTD3306C datasheet (Rev. A) (영어)

SN74CBTD3306C

활성

데이터 시트

지금 주문

제품 상세 정보

Configuration

1:1 SPST

Number of channels

2

Power supply voltage - single (V)

5

Protocols

Analog

Ron (typ) (Ω)

3

CON (typ) (pF)

12.5

Bandwidth (MHz)

20

Operating temperature range (°C)

-40 to 85

Features

Undershoot protection

Input/output continuous current (max) (mA)

128

Rating

Catalog

Drain supply voltage (max) (V)

5.5

Supply voltage (max) (V)

5.5

Configuration

1:1 SPST

Number of channels

2

Power supply voltage - single (V)

5

Protocols

Analog

Ron (typ) (Ω)

3

CON (typ) (pF)

12.5

Bandwidth (MHz)

20

Operating temperature range (°C)

-40 to 85

Features

Undershoot protection

Input/output continuous current (max) (mA)

128

Rating

Catalog

Drain supply voltage (max) (V)

5.5

Supply voltage (max) (V)

5.5

SOIC (D)

8

29.4 mm² 4.9 x 6

TSSOP (PW)

8

19.2 mm² 3 x 6.4

Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
Integrated Diode to V_CC Provides 5-V Input Down To 3.3-V Output Level Shift
Bidirectional Data Flow, With Near-Zero Propagation Delay
Low ON-State Resistance (r_on) Characteristics (r_on = 3 Typical)
Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C_io(OFF) = 5 pF Typical)
Data and Control Inputs Provide Undershoot Clamp Diodes
V_CC Operating Range From 4.5 V to 5.5 V
Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications: USB Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
Integrated Diode to V_CC Provides 5-V Input Down To 3.3-V Output Level Shift
Bidirectional Data Flow, With Near-Zero Propagation Delay
Low ON-State Resistance (r_on) Characteristics (r_on = 3 Typical)
Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C_io(OFF) = 5 pF Typical)
Data and Control Inputs Provide Undershoot Clamp Diodes
V_CC Operating Range From 4.5 V to 5.5 V
Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications: USB Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

The SN74CBTD3306C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r_on), allowing for minimal propagation delay. This device features an integrated diode in series with V_CC to provide level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBTD3306C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBTD3306C is organized as two 1-bit bus switches with separate output-enable (1OE\, 2OE\) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE\ is low, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTD3306C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r_on), allowing for minimal propagation delay. This device features an integrated diode in series with V_CC to provide level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBTD3306C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBTD3306C is organized as two 1-bit bus switches with separate output-enable (1OE\, 2OE\) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE\ is low, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

filter

기타 아날로그 스위치 및 멀티플렉서 찾기

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new

대안 비교

비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀

SN74CBT3306C

활성

-2V 언더슈트 보호 기능을 지원하는 5V, 1:1(SPST), 2채널 FET 버스 스위치(액티브 로우) Supports I2C and UART

기술 자료

star

=TI에서 선정한 이 제품의 인기 문서

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.

13개 모두 보기

	유형	직함		날짜
*	Data sheet	SN74CBTD3306C datasheet (Rev. A)		2003/10/15
	Application note	Selecting the Correct Texas Instruments Signal Switch (Rev. E)	PDF \| HTML	2022/06/02
	Application note	Multiplexers and Signal Switches Glossary (Rev. B)	PDF \| HTML	2021/12/01
	Application note	CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C)	PDF \| HTML	2021/11/19
	Application brief	Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C)	PDF \| HTML	2021/01/06
	Selection guide	Little Logic Guide 2018 (Rev. G)		2018/07/06
	Selection guide	Logic Guide (Rev. AB)		2017/06/12
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015/12/02
	User guide	LOGIC Pocket Data Book (Rev. B)		2007/01/16
	More literature	Digital Bus Switch Selection Guide (Rev. A)		2004/11/10
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004/07/08
	User guide	Signal Switch Data Book (Rev. A)		2003/11/14
	Application note	Bus FET Switch Solutions for Live Insertion Applications		2003/02/07

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

DIP-ADAPTER-EVM — DIP 어댑터 평가 모듈

소형 표면 실장 IC(집적 회로)와 쉽고 빠르며 경제적인 방식으로 인터페이싱하는 방법을 제공하는 DIP 어댑터 평가 모듈(DIP-ADAPTER-EVM)로 연산 증폭기 프로토타이핑 및 테스트 속도를 높이세요. 제품에 포함된 Samtec 터미널 스트립을 사용하여 지원되는 연산 증폭기를 연결하거나 기존 회로에 직접 연결할 수 있습니다.

DIP 어댑터 EVM 키트는 다음을 포함해 가장 널리 사용되는 6개의 업계 표준 패키지를 지원합니다.

D 및 U(SOIC-8)
PW(TSSOP-8)
DGK(MSOP-8, VSSOP-8)
(...)

사용 설명서: PDF

TI.com에서 구매 불가

인터페이스 어댑터

LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.

사용 설명서: PDF