제품 상세 정보

Configuration 1:1 SPST Number of channels 2 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 7.5 CON (typ) (pF) 14 ON-state leakage current (max) (µA) 2 Supply current (typ) (µA) 1 Bandwidth (MHz) 300 Operating temperature range (°C) -40 to 125 Input/output continuous current (max) (mA) 50 Rating Automotive Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 1:1 SPST Number of channels 2 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 7.5 CON (typ) (pF) 14 ON-state leakage current (max) (µA) 2 Supply current (typ) (µA) 1 Bandwidth (MHz) 300 Operating temperature range (°C) -40 to 125 Input/output continuous current (max) (mA) 50 Rating Automotive Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
VSSOP (DCU) 8 6.2 mm² 2 x 3.1
  • Functional safety-capable
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C3B
  • 1.65 V to 5.5 V VCC operation
  • Inputs accept voltages to 5.5 V
  • High on-off output voltage ratio
  • High degree of linearity
  • High speed, typically 0.5 ns (VCC = 3 V, CL = 50 pF)
  • Rail-to-rail input output
  • Low on-state resistance, typically ≉6 Ω (VCC = 4.5 V)
  • Functional safety-capable
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 1: –40°C to +125°C ambient operating temperature range
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C3B
  • 1.65 V to 5.5 V VCC operation
  • Inputs accept voltages to 5.5 V
  • High on-off output voltage ratio
  • High degree of linearity
  • High speed, typically 0.5 ns (VCC = 3 V, CL = 50 pF)
  • Rail-to-rail input output
  • Low on-state resistance, typically ≉6 Ω (VCC = 4.5 V)

The design of this dual bilateral analog switch is for 1.65 V to 5.5 V VCC operation. The SN74LVC2G66-Q1 can handle both analog and digital signals. The device permits signals with amplitudes of up to 5.5 V (peak) to be transmitted in either direction. Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

The design of this dual bilateral analog switch is for 1.65 V to 5.5 V VCC operation. The SN74LVC2G66-Q1 can handle both analog and digital signals. The device permits signals with amplitudes of up to 5.5 V (peak) to be transmitted in either direction. Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

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기술 자료

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31개 모두 보기
유형 직함 날짜
* Data sheet SN74LVC2G66-Q1 Automotive Dual Bilateral Analog Switch datasheet (Rev. B) PDF | HTML 2021/10/27
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022/06/02
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021/12/01
Functional safety information SN74LVC2G66-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FM PDF | HTML 2021/10/15
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Little Logic Guide 2018 (Rev. G) 2018/07/06
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note How to Select Little Logic (Rev. A) 2016/07/26
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
More literature Automotive Logic Devices Brochure 2014/08/27
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Product overview Design Summary for WCSP Little Logic (Rev. B) 2004/11/04
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
Application note Selecting the Right Level Translation Solution (Rev. A) 2004/06/22
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits 2003/11/06
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 2002/12/18
Application note Texas Instruments Little Logic Application Report 2002/11/01
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
More literature Standard Linear & Logic for PCs, Servers & Motherboards 2002/06/13
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 2002/05/22
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 2002/05/10
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 2002/03/27
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 1997/12/01
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 1997/08/01
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note LVC Characterization Information 1996/12/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Design guide Low-Voltage Logic (LVC) Designer's Guide 1996/09/01
Application note Understanding Advanced Bus-Interface Products Design Guide 1996/05/01

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평가 보드

DIP-ADAPTER-EVM — DIP 어댑터 평가 모듈

소형 표면 실장 IC(집적 회로)와 쉽고 빠르며 경제적인 방식으로 인터페이싱하는 방법을 제공하는 DIP 어댑터 평가 모듈(DIP-ADAPTER-EVM)로 연산 증폭기 프로토타이핑 및 테스트 속도를 높이세요. 제품에 포함된 Samtec 터미널 스트립을 사용하여 지원되는 연산 증폭기를 연결하거나 기존 회로에 직접 연결할 수 있습니다.

DIP 어댑터 EVM 키트는 다음을 포함해 가장 널리 사용되는 6개의 업계 표준 패키지를 지원합니다.

  • D 및 U(SOIC-8)
  • PW(TSSOP-8)
  • DGK(MSOP-8, VSSOP-8)
  • (...)
사용 설명서: PDF
TI.com에서 구매 불가
인터페이스 어댑터

LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

사용 설명서: PDF
TI.com에서 구매 불가
시뮬레이션 모델

SN74LVC2G66-Q1 PSpice Model (Rev. B)

SCEM562B.ZIP (27 KB) - PSpice Model
시뮬레이션 모델

SN74LVC2G66-Q1 TINA-TI Reference Design (Rev. A)

SCEM573A.TSC (289 KB) - TINA-TI Reference Design
시뮬레이션 모델

SN74LVC2G66-Q1 TINA-TI Spice Model (Rev. A)

SCEM572A.ZIP (3 KB) - TINA-TI Spice Model
패키지 CAD 기호, 풋프린트 및 3D 모델
VSSOP (DCU) 8 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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