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Rating Catalog Operating temperature range (°C) 0 to 70
Rating Catalog Operating temperature range (°C) 0 to 70
TQFP (PAG) 64 144 mm² 12 x 12
  • High-Quality Audio Performance:
    102-dB Analog-to-Digital Converter (ADC)/105-dB
    Digital-to-Analog Converter (DAC) (Typical) DNR
  • Two Differential Stereo Analog Inputs Multiplexed to
    One Stereo Input ADC
  • One Differential Stereo Output DAC
  • Two Serial Audio Inputs (Four Channels) and
    Two Serial Audio Outputs (Four Channels)
  • 135-MHz Maximum Speed, >2812 Total Processing Cycles
    Per Sample at 48 kHz (2000 Available for Application Code)
  • 512×Fs XTAL Input in Master Mode,
    512×Fs MCLK_IN in Slave Mode
  • 48-kHz Sample Rate in Clock Master Mode
  • 44.1-kHz or 48-kHz Sample Rate in Clock Slave Mode
  • 48-Bit Data Path and 28-Bit Coefficients
  • 768 Words of 48-Bit Data Memory
  • 1022 Words of 28-Bit Coefficient Memory
  • 3K Words of 55-Bit Program RAM
  • Hardware Single-Cycle Multiplier (28×48)
  • 5.88K Words of 24-Bit Delay Memory (122.5 ms at 48 kHz)
  • Data Formats: Left Justified, Right Justified, and I2S
  • Two I2C Ports for Slave/Master Download
  • Single 3.3-V Power Supply
  • APPLICATIONS
    • MP3 Docking Systems
    • Digital Televisions
    • Mini-Component Audio

  • High-Quality Audio Performance:
    102-dB Analog-to-Digital Converter (ADC)/105-dB
    Digital-to-Analog Converter (DAC) (Typical) DNR
  • Two Differential Stereo Analog Inputs Multiplexed to
    One Stereo Input ADC
  • One Differential Stereo Output DAC
  • Two Serial Audio Inputs (Four Channels) and
    Two Serial Audio Outputs (Four Channels)
  • 135-MHz Maximum Speed, >2812 Total Processing Cycles
    Per Sample at 48 kHz (2000 Available for Application Code)
  • 512×Fs XTAL Input in Master Mode,
    512×Fs MCLK_IN in Slave Mode
  • 48-kHz Sample Rate in Clock Master Mode
  • 44.1-kHz or 48-kHz Sample Rate in Clock Slave Mode
  • 48-Bit Data Path and 28-Bit Coefficients
  • 768 Words of 48-Bit Data Memory
  • 1022 Words of 28-Bit Coefficient Memory
  • 3K Words of 55-Bit Program RAM
  • Hardware Single-Cycle Multiplier (28×48)
  • 5.88K Words of 24-Bit Delay Memory (122.5 ms at 48 kHz)
  • Data Formats: Left Justified, Right Justified, and I2S
  • Two I2C Ports for Slave/Master Download
  • Single 3.3-V Power Supply
  • APPLICATIONS
    • MP3 Docking Systems
    • Digital Televisions
    • Mini-Component Audio

The TAS3202 is an audio system-on-a-chip (SOC) designed for mini/micro systems, multimedia-speaker, and MP3 player docking systems. It includes analog interface functions: two multiplex (MUX) stereo inputs with one stereo analog-to-digital converter (ADC) and one stereo digital-to-analog converter (DAC) with analog outputs consisting of differential stereo line drivers. Four channels of serial digital audio processing are also provided. The TAS3202 has a programmable audio digital signal processor (DSP) that preserves high-quality audio by using a 48-bit data path, 28-bit filter coefficients, and a single-cycle 28×48-bit multiplier. The programmability feature allows users to customize features in the DSP RAM.

The TAS3202 is composed of eight functional blocks:

  1. Analog input/mux/stereo ADC
  2. Stereo DAC
  3. Analog reference system
  4. Power supply
  5. Clocks, digital PLL, and serial data interface
  6. I2C control interface
  7. 8051 microcontroller
  8. Audio DSP – digital audio processing

The TAS3202 is an audio system-on-a-chip (SOC) designed for mini/micro systems, multimedia-speaker, and MP3 player docking systems. It includes analog interface functions: two multiplex (MUX) stereo inputs with one stereo analog-to-digital converter (ADC) and one stereo digital-to-analog converter (DAC) with analog outputs consisting of differential stereo line drivers. Four channels of serial digital audio processing are also provided. The TAS3202 has a programmable audio digital signal processor (DSP) that preserves high-quality audio by using a 48-bit data path, 28-bit filter coefficients, and a single-cycle 28×48-bit multiplier. The programmability feature allows users to customize features in the DSP RAM.

The TAS3202 is composed of eight functional blocks:

  1. Analog input/mux/stereo ADC
  2. Stereo DAC
  3. Analog reference system
  4. Power supply
  5. Clocks, digital PLL, and serial data interface
  6. I2C control interface
  7. 8051 microcontroller
  8. Audio DSP – digital audio processing

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기술 자료

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3개 모두 보기
유형 직함 날짜
* Data sheet TAS3202 Audio DSP With Analog Interface datasheet (Rev. B) 2011/03/17
* Errata TAS3202 Data Sheet Errata 2010/03/18
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 2024/04/30

설계 및 개발

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패키지 CAD 기호, 풋프린트 및 3D 모델
TQFP (PAG) 64 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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