제품 상세 정보

Number of ADC channels 1 Number of DAC channels 1 Digital audio interface DSP Analog inputs 2 Analog outputs 1 Sampling rate (max) (kHz) 22.05 Rating Catalog ADC SNR (typ) (dB) 87 DAC SNR (typ) (dB) 90 Operating temperature range (°C) -40 to 85
Number of ADC channels 1 Number of DAC channels 1 Digital audio interface DSP Analog inputs 2 Analog outputs 1 Sampling rate (max) (kHz) 22.05 Rating Catalog ADC SNR (typ) (dB) 87 DAC SNR (typ) (dB) 90 Operating temperature range (°C) -40 to 85
TQFP (PFB) 48 81 mm² 9 x 9
  • C54xx software driver available
  • 16-bit oversampling sigma-delta A/D converter
  • 16-bit oversampling sigma-delta D/A converter
  • Maximum output conversion rate:
    • 22 ksps with on-chip FIR filter
    • 88 ksps with FIR bypassed
  • Voiceband bandwidth in FIR-bypassed mode and final sampling rate at 8 ksps
    • 90-dB SNR/ADC and 87-dB SNR/DAC with DSPs FIR (FIR bypassed at 88 ksps/5 V)
    • 87-dB SNR/ADC and 85-dB SNR/DAC with DSPs FIR (FIR bypassed at 88 ksps/3.3 V)
  • On-chip FIR produced 84-dB SNR for ADC and 85-dB SNR for DAC over 11-kHz BW
  • Built-in functions including PGA, antialiasing analog filter, and operational amplifiers for general-purpose interface (such as MIC interface and hybrid interface)
  • Glueless serial port interface to DSPs (TI TMS320Cxx, SPI, or standard DSPs)
  • Automatic cascading detection (ACD) makes cascade programming simple and allows up to 8 devices to be connected in cascade.
  • On-fly reconfiguration modes include secondary-communication mode and direct-configuration mode (host interface).
  • Continuous data-transfer mode for use with autobuffering (ABU) to reduce DSP interrupt service overhead
  • Event-monitor mode provides external-event control, such as RING/OFF-HOOK detection
  • Programmable ADC and DAC conversion rate
  • Programmable input and output gain control
  • Separate software control for ADC and DAC power-down
  • Analog (3-V to 5.5-V) supply operation
  • Digital (3-V to 5.5-V) supply operation
  • Power dissipation (PD) of 39 mWrms typical for 8-ksps at 3.3 V
  • Hardware power-down mode to 0.5 mW
  • Internal and external reference voltage (Vref)
  • Differential and single-ended analog input/output
  • 2s-complement data format
  • Test mode, which includes digital loopback and analog loopback
  • 600-ohm output driver

  • C54xx software driver available
  • 16-bit oversampling sigma-delta A/D converter
  • 16-bit oversampling sigma-delta D/A converter
  • Maximum output conversion rate:
    • 22 ksps with on-chip FIR filter
    • 88 ksps with FIR bypassed
  • Voiceband bandwidth in FIR-bypassed mode and final sampling rate at 8 ksps
    • 90-dB SNR/ADC and 87-dB SNR/DAC with DSPs FIR (FIR bypassed at 88 ksps/5 V)
    • 87-dB SNR/ADC and 85-dB SNR/DAC with DSPs FIR (FIR bypassed at 88 ksps/3.3 V)
  • On-chip FIR produced 84-dB SNR for ADC and 85-dB SNR for DAC over 11-kHz BW
  • Built-in functions including PGA, antialiasing analog filter, and operational amplifiers for general-purpose interface (such as MIC interface and hybrid interface)
  • Glueless serial port interface to DSPs (TI TMS320Cxx, SPI, or standard DSPs)
  • Automatic cascading detection (ACD) makes cascade programming simple and allows up to 8 devices to be connected in cascade.
  • On-fly reconfiguration modes include secondary-communication mode and direct-configuration mode (host interface).
  • Continuous data-transfer mode for use with autobuffering (ABU) to reduce DSP interrupt service overhead
  • Event-monitor mode provides external-event control, such as RING/OFF-HOOK detection
  • Programmable ADC and DAC conversion rate
  • Programmable input and output gain control
  • Separate software control for ADC and DAC power-down
  • Analog (3-V to 5.5-V) supply operation
  • Digital (3-V to 5.5-V) supply operation
  • Power dissipation (PD) of 39 mWrms typical for 8-ksps at 3.3 V
  • Hardware power-down mode to 0.5 mW
  • Internal and external reference voltage (Vref)
  • Differential and single-ended analog input/output
  • 2s-complement data format
  • Test mode, which includes digital loopback and analog loopback
  • 600-ohm output driver

The TLV320AIC10 provides high resolution signal conversion from digital-to-analog (D/A) and from analog-to-digital (A/D) using oversampling sigma-delta technology. It allows 2-to-1 MUX inputs with built-in antialiasing filter and amplification for general-purpose applications such as telephone hybrid interface, electret microphone preamp, etc. Both IN and AUX inputs accept normal analog signals. This device consists of a pair of 16-bit synchronous serial conversion paths (one for each direction), and includes an interpolation filter before the DAC and a decimation filter after the ADC. The FIR filters can be bypassed to offer flexibility and power savings. Other overhead functions provide on-chip include timing (programmable sample rate, continuous data transfer, and FIR bypass) and control (programmable-gain amplifier, communication protocol, etc.). The sigma-delta architecture produces high-resolution analog-to-digital and digital-to-analog conversion at low system cost.

The TLV320AIC10 design enhances communication with the DSP. The continuous data transfer mode fully supports TI’s DSP autobuffering (ABU) to reduce DSP interrupt service overhead. The automatic cascading detection (ACD) makes cascade programming simple and supports a cascade operation of one master and up to seven slaves. The direct-configuration mode for host interface uses a single-wire serial port to directly program internal registers without interference from the data conversion serial port, or without resetting the entire device. The event monitor mode allows the DSP to monitor external events like phone off-hook ring detection.

In the lower-power mode, the TLV320AIC10 converts data at a sampling rate of 8 KSPS consuming only 39 mW.

The programmable functions of this device are configured through a serial interface that can be gluelessly interfaced to any DSP that accepts 4-wire serial communications, such as the TMS320Cxx. The options include software reset, device power-down, separate control for ADC and DAC turnoff, communications protocol, signal-sampling rate, gain control, and system-test modes, as outlined in Appendix A.

The TLV320AIC10 is particularly suitable for a variety of applications in hands-free car kits, VOIP, cable modem, speech, and the telephony area including low-bit rate, high-quality compression, speech enhancement, recognition, and synthesis. Its low-group delay characteristic makes it suitable for single or multichannel active-control applications.

The TLV320AIC10 is characterized for commercial operation from 0°C to 70°C, and industrial operation from –40°C to 85°C.

The TLV320AIC10 provides high resolution signal conversion from digital-to-analog (D/A) and from analog-to-digital (A/D) using oversampling sigma-delta technology. It allows 2-to-1 MUX inputs with built-in antialiasing filter and amplification for general-purpose applications such as telephone hybrid interface, electret microphone preamp, etc. Both IN and AUX inputs accept normal analog signals. This device consists of a pair of 16-bit synchronous serial conversion paths (one for each direction), and includes an interpolation filter before the DAC and a decimation filter after the ADC. The FIR filters can be bypassed to offer flexibility and power savings. Other overhead functions provide on-chip include timing (programmable sample rate, continuous data transfer, and FIR bypass) and control (programmable-gain amplifier, communication protocol, etc.). The sigma-delta architecture produces high-resolution analog-to-digital and digital-to-analog conversion at low system cost.

The TLV320AIC10 design enhances communication with the DSP. The continuous data transfer mode fully supports TI’s DSP autobuffering (ABU) to reduce DSP interrupt service overhead. The automatic cascading detection (ACD) makes cascade programming simple and supports a cascade operation of one master and up to seven slaves. The direct-configuration mode for host interface uses a single-wire serial port to directly program internal registers without interference from the data conversion serial port, or without resetting the entire device. The event monitor mode allows the DSP to monitor external events like phone off-hook ring detection.

In the lower-power mode, the TLV320AIC10 converts data at a sampling rate of 8 KSPS consuming only 39 mW.

The programmable functions of this device are configured through a serial interface that can be gluelessly interfaced to any DSP that accepts 4-wire serial communications, such as the TMS320Cxx. The options include software reset, device power-down, separate control for ADC and DAC turnoff, communications protocol, signal-sampling rate, gain control, and system-test modes, as outlined in Appendix A.

The TLV320AIC10 is particularly suitable for a variety of applications in hands-free car kits, VOIP, cable modem, speech, and the telephony area including low-bit rate, high-quality compression, speech enhancement, recognition, and synthesis. Its low-group delay characteristic makes it suitable for single or multichannel active-control applications.

The TLV320AIC10 is characterized for commercial operation from 0°C to 70°C, and industrial operation from –40°C to 85°C.

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
TLV320AIC12K 활성 8옴 스피커 증폭기를 지원하는 저전력 모노 음성 대역 코덱 Lower Power with Speaker Amplifier and Higher Sampling Rate
TLV320AIC14K 활성 저전력 모노 음성 대역 코덱 Lower Power and Higher Sampling Rate
TLV320AIC3104 활성 저전력 스테레오 코덱(6 입력, 6 출력, HP 증폭기 및 고급 디지털 효과 포함) Stereo Codec with 102/92dB SNR DAC/ADC up to 32bit resolution, Single-ended and Differential I/O options
TLV320AIC3105 활성 저전력 스테레오 코덱(6 입력, 6 출력, HP 증폭기 및 고급 디지털 효과 포함) Stereo Codec with 102/92dB SNR DAC/ADC up to 32bit resolution, SE Inputs and SE/Differential Outputs

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
12개 모두 보기
유형 직함 날짜
* Data sheet General-Purpose 3 V to 5.5 V 16-Bit 22-KSPS DSP Codec datasheet (Rev. F) 2002/03/05
Application note Out-of-Band Noise Measurement Issues for Audio Devices (Rev. A) 2019/12/31
Application note Audio Serial Interface Configurations for Audio Codecs (Rev. A) 2019/06/27
Application note Using the MSP430 Launchpad as a Standalone I2C Host for Audio Products (Rev. A) 2013/10/28
Application note Audio Serial Interface Configurations for Audio Codecs 2010/09/22
Application note Solving Enumeration Errors in USB Audio DAC and CODEC Designs 2009/10/30
Application note Configuring I2S to Generate BCLK from Codec Devices & WCLK from McBSP Port 2009/07/08
Application note How to Set the TSC/AIC EVM to Record & Playback Audio or Other Sound Through PC 2004/12/14
Application note Common Sample Rate Selection For TLV320AIC12/13/14/15/20/21/24/25 Codecs 2003/04/30
Application note TLV320AIC12/13/14/15 CODEC Operating Under Stand-Alone Slave Mode 2002/05/16
EVM User's guide TLV320AIC10 EVM User's Guide (Rev. D) 2001/01/12
Application note Interfacing the TLV320AIC10/11 Codec to the TMS320C5402 DSP 2000/12/18

설계 및 개발

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시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 CAD 기호, 풋프린트 및 3D 모델
TQFP (PFB) 48 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

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