TMUX7219-Q1
- AEC-Q100 qualified for automotive applications
- Device temperature grade 1: –40°C to 125°C ambient operating temperature
- Functional safety-capable
- Latch-up immune
- Dual supply range: ±4.5V to ±22V
- Single supply range: 4.5V to 44V
- Low on-resistance: 2.1Ω
- Low charge injection: −10pC
- High current support: 330mA (maximum)
- 1.8V logic compatible
- Fail-safe logic
- Rail-to-rail operation
- Bidirectional signal path
- Break-before-make switching
The TMUX7219-Q1 is a complementary metal-oxide semiconductor (CMOS) switch with latch-up immunity in a single channel, 2:1 (SPDT) configuration. The device works with a single supply (4.5 V to 44 V), dual supplies (±4.5V to ±22V), or asymmetric supplies (such as VDD = 12V, VSS = –5V). The TMUX7219-Q1 supports bidirectional analog and digital signals on the source (Sx) and drain (D) pins ranging from VSS to VDD.
The TMUX7219-Q1 can be enabled or disabled by controlling the EN pin. When disabled, both signal path switches are off. When enabled, the SEL pin can be used to turn on signal path 1 (S1 to D) or signal path 2 (S2 to D). All logic control inputs support logic levels from 1.8V to VDD, ensuring both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-Safe Logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage.
The TMUX72xx family provides latch-up immunity, preventing undesirable high current events between parasitic structures within the device typically caused by overvoltage events. A latch-up condition typically continues until the power supply rails are turned off and can lead to device failure. The latch-up immunity feature allows the TMUX72xx family of switches and multiplexers to be used in harsh environments.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | TMUX7219-Q1 44V , Latch-Up Immune, 2:1 (SPDT) Precision Switch with 1.8V Logic datasheet (Rev. B) | PDF | HTML | 2024/07/10 |
Application note | How to Handle High Voltage Common Mode Applications using Multiplexers | PDF | HTML | 2022/10/03 | |
Application note | Using Latch Up Immune Multiplexers to Help Improve System Reliability (Rev. A) | 2021/09/20 | ||
Functional safety information | TMUX7219-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA | PDF | HTML | 2021/06/14 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
VSSOP (DGK) | 8 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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