TPA6100A2
- 50-mW Stereo Output
- Low Supply Current...0.75 mA
- Low Shutdown Current...50 nA
- Pin Compatible With LM4881 and TPA102(1)
- Pop Reduction Circuitry
- Internal Midrail Generation
- Thermal and Short-Circuit Protection
- Surface-Mount Packaging
- MSOP and SOIC
- 1.6-V to 3.6-V Supply Voltage Range
(1) The polarity of the SHUTDOWN\ pin is reversed.
The TPA6100A2D is a stereo audio power amplifier packaged in either an 8-pin SOIC package or an 8-pin MSOP package capable of delivering 50 mW of continuous RMS power per channel into 16- loads. Amplifier gain is externally configured by a means of three resistors per input channel and does not require external compensation for settings of 1 to 10.
The TPA6100A2D is optimized for battery applications because of its low supply current, shutdown current, and THD+N. To obtain the low-supply voltage range, the TPA6100A2D biases BYPASS to VDD/4. A resistor with a resistance equal to RF must be added from the inputs to ground to allow the output to be biased at VDD/2.
When driving a 16- load with 45-mW output power from 3.3 V, THD+N is 0.04% at 1 kHz, and less than 0.2% across the audio band of 20 Hz to 20 kHz. For 28 mW into 32- loads, the THD+N is reduced to less than 0.03% at 1 kHz, and is less than 0.2% across the audio band of 20 Hz to 20 kHz.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | 50-mW Ultralow Voltage Stereo Headphone Audio Power Amplifier datasheet (Rev. B) | 2004/09/09 | |
Application note | Guidelines for Measuring Audio Power Amplifier Performance (Rev. A) | 2019/08/26 | ||
Application note | AN-1849 An Audio Amplifier Power Supply Design (Rev. C) | 2019/06/27 | ||
User guide | TPA6100A2EVM - User Guide | 2000/12/12 | ||
Application note | A Low-Cost, Single Coupling Capacitor Config. for Stereo Headphone Amplifiers | 1999/12/22 |
설계 및 개발
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TPA6100A2EVM — TPA6100A2 EVM(평가 모듈)
The TPA6100A2 is a stereo headphone amplifier capable of delivering 50mW of continuous RMS power per channel into 16-Ohm speakers. The amplifier's gain is externally set by three resistors per input channel.
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
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패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
SOIC (D) | 8 | Ultra Librarian |
VSSOP (DGK) | 8 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.