TS12A44515
- 2-V to 12-V Single-Supply Operation
- Specified ON-State Resistance:
- 15-Ω Maximum With 12-V Supply
- 20-Ω Maximum With 5-V Supply
- 50-Ω Maximum With 3.3-V Supply
- ΔRON Matching
- 2.5-Ω (Max) at 12 V
- 3-Ω (Max) at 5 V
- 3.5-Ω (Max) at 3.3 V
- Specified Low OFF-Leakage Currents:
- 1 nA at 25°C
- 10 nA at 85°C
- Specified Low ON-Leakage Currents:
- 1 nA at 25°C
- 10 nA at 85&25;C
- Low Charge Injection: 11.5 pC (12-V Supply)
- Fast Switching Speed:
tON = 80 ns, tOFF = 50 ns
(12-V Supply) - Break-Before-Make Operation (tON > tOFF)
- TTL/CMOS-Logic Compatible With 5-V Supply
- Available in 14-Pin TSSOP Package or 14-Pin
SOIC Package
The TS12A44513, TS12A44514, and TS12A44515 devices have four bidirectional single-pole single-throw (SPST) single-supply CMOS analog switches. The TS12A44513 has two normally closed (NC) switches and two normally open (NO) switches, the TS12A44514 has four NO switches, and the TS12A44515 has four NC switches.
These CMOS switches may operate continuously with a single supply from 2 V to 12 V and can handle rail-to-rail analog signals. The OFF-leakage current maximum is only 1 nA at 25°C or 10 nA at 85°C.
When using a 5-V supply, all digital inputs have 0.8-V to 2.4-V logic thresholds, ensuring TTL/CMOS-logic compatibility.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | TS12A4451x Low ON-State Resistance 4-Channel SPST CMOS Analog Switches datasheet (Rev. B) | PDF | HTML | 2016/02/01 |
Application note | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022/06/02 | |
Application note | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021/12/01 | |
Application note | Preventing Excess Power Consumption on Analog Switches | 2008/07/03 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
SOIC (D) | 14 | Ultra Librarian |
TSSOP (PW) | 14 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.