제품 상세 정보

Protocols Composite, RGB, VGA Configuration 2:1 SPDT Number of channels 7 Bandwidth (MHz) 1300 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 3 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Supply current (typ) (µA) 200 ESD HBM (typ) (kV) 7 Operating temperature range (°C) -40 to 85 Crosstalk (dB) -47 ESD CDM (kV) 2 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 3 CON (typ) (pF) 8 Off isolation (typ) (dB) -38 OFF-state leakage current (max) (µA) 1 Propagation delay time (µs) 0.00025 Ron (max) (mΩ) 6000 Ron channel match (max) (Ω) 1 RON flatness (typ) (Ω) 0.2 Turnoff time (disable) (max) (ns) 13 Turnon time (enable) (max) (ns) 13 VIH (min) (V) 2 VIL (max) (V) 0.8
Protocols Composite, RGB, VGA Configuration 2:1 SPDT Number of channels 7 Bandwidth (MHz) 1300 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 3 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Supply current (typ) (µA) 200 ESD HBM (typ) (kV) 7 Operating temperature range (°C) -40 to 85 Crosstalk (dB) -47 ESD CDM (kV) 2 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 3 CON (typ) (pF) 8 Off isolation (typ) (dB) -38 OFF-state leakage current (max) (µA) 1 Propagation delay time (µs) 0.00025 Ron (max) (mΩ) 6000 Ron channel match (max) (Ω) 1 RON flatness (typ) (Ω) 0.2 Turnoff time (disable) (max) (ns) 13 Turnon time (enable) (max) (ns) 13 VIH (min) (V) 2 VIL (max) (V) 0.8
WQFN (RTG) 32 18 mm² 6 x 3
  • Supports 7-Channel VGA Signals (R, G, B, HSYNC, VSYNC, DDC CLK, and DDC DAT)
  • Integrated Level-Shifting Buffers for HSYNC and VSYNC Channels
  • Operating Voltage
    • VDD = 3.3 V ±10%
    • VDD_5 = 5 V ±10%
  • High Bandwidth of 1.3 GHz (–3 dB)
  • Low ON-State Resistance and Input/Output Capacitance
    • rON = 4 (Typ)
    • CON = 8 pF (Typ)
  • Voltage Clamping NMOS Switches for SCL and SDA Channels
  • ESD Performance (Pins 12–15, 17–22, 24–27)
    • ±2-kV Contact Discharge (IEC61000-4-2)
    • 7-kV Human Body Model (to GND)
  • ESD Performance (All Pins)
    • 3-kV Human Body Model (JESD22-A114E)
  • 32-Pin Quad Flat Pack No-Lead [QFN (RTG)] Package
  • APPLICATIONS
    • Notebook Computers
    • Docking Stations
    • KVM Switches

  • Supports 7-Channel VGA Signals (R, G, B, HSYNC, VSYNC, DDC CLK, and DDC DAT)
  • Integrated Level-Shifting Buffers for HSYNC and VSYNC Channels
  • Operating Voltage
    • VDD = 3.3 V ±10%
    • VDD_5 = 5 V ±10%
  • High Bandwidth of 1.3 GHz (–3 dB)
  • Low ON-State Resistance and Input/Output Capacitance
    • rON = 4 (Typ)
    • CON = 8 pF (Typ)
  • Voltage Clamping NMOS Switches for SCL and SDA Channels
  • ESD Performance (Pins 12–15, 17–22, 24–27)
    • ±2-kV Contact Discharge (IEC61000-4-2)
    • 7-kV Human Body Model (to GND)
  • ESD Performance (All Pins)
    • 3-kV Human Body Model (JESD22-A114E)
  • 32-Pin Quad Flat Pack No-Lead [QFN (RTG)] Package
  • APPLICATIONS
    • Notebook Computers
    • Docking Stations
    • KVM Switches

The TS3V712EL is a high bandwidth, 7-channel video demultiplexer for switching between a single VGA source and one of two end points. The device is designed for ensuring video signal integrity and minimizing video signal attenuation by providing high bandwidth of 1.3 GHz.

The TS3V712EL has integrated level shifting buffers for the HSYNC and VSYNC signals which provide voltage level translation between 3.3 V and 5 V logic. The SCL and SDA lines use NMOS switches which clamp the output voltage to 1 V below VDD.

The video signals are protected against ESD with integrated diodes to VDD and GND that support levels up to ±2-kV Contact Discharge (IEC61000-4-2) and 7-kV Human Body Model (JESD22-A114E).

The TS3V712EL is a high bandwidth, 7-channel video demultiplexer for switching between a single VGA source and one of two end points. The device is designed for ensuring video signal integrity and minimizing video signal attenuation by providing high bandwidth of 1.3 GHz.

The TS3V712EL has integrated level shifting buffers for the HSYNC and VSYNC signals which provide voltage level translation between 3.3 V and 5 V logic. The SCL and SDA lines use NMOS switches which clamp the output voltage to 1 V below VDD.

The video signals are protected against ESD with integrated diodes to VDD and GND that support levels up to ±2-kV Contact Discharge (IEC61000-4-2) and 7-kV Human Body Model (JESD22-A114E).

다운로드 스크립트와 함께 비디오 보기 동영상

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
3개 모두 보기
유형 직함 날짜
* Data sheet 7-CHANNEL, 1:2 VIDEO SWITCH WITH INTEGRATED LEVEL SHIFTERS datasheet (Rev. A) 2010/09/03
Application note Preventing Excess Power Consumption on Analog Switches 2008/07/03
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

패키지 CAD 기호, 풋프린트 및 3D 모델
WQFN (RTG) 32 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상