TS5A22364
- Specified Break-Before-Make Switching
- Negative Signaling Capability: Maximum Swing from –2.75 V to 2.75 V (VCC = 2.75 V)
- Internal Shunt Switch Prevents Audible Click-and-Pop When Switching Between Two Sources
- Low ON-State Resistance (0.65 Ω Typical)
- Low Charge Injection
- Excellent ON-State Resistance Matching
- 2.3-V to 5.5-V Power Supply (VCC)
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2500-V Human-Body Model
(A114-B, Class II) - 1500-V Charged-Device Model (C101)
- 200-V Machine Model (A115-A)
- 2500-V Human-Body Model
The TS5A22364 is a bidirectional, 2-channel, single-pole double-throw (SPDT) analog switch designed to operate from 2.3 V to 5.5 V. The device features negative signal capability that allows signals below ground to pass through the switch without distortion. Additionally, the TS5A22364 includes an internal shunt switch, which automatically discharges any capacitance at the NC or NO terminals when they are unconnected to COM. This reduces the audible click/pop noise when switching between two sources. The break-before-make feature prevents signal distortion during the transferring of a signal from one path to another. Low ON-state resistance, excellent channel-to-channel ON-state resistance matching, and minimal total harmonic distortion (THD) performance are ideal for audio applications. The 3.00-mm x 3.00-mm DRC package is also available as a nonmagnetic package for medical imaging applications.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | TS5A22364 0.65-Ω Dual SPDT Analog Switches With Negative Signaling Capability datasheet (Rev. H) | PDF | HTML | 2017/06/21 |
Application brief | 1.8-V Logic for Multiplexers and Signal Switches (Rev. C) | PDF | HTML | 2022/07/26 | |
Application note | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022/06/02 | |
Application note | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021/12/01 | |
Application note | Preventing Excess Power Consumption on Analog Switches | 2008/07/03 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
LEADLESS-ADAPTER1 — TI의 6, 8, 10, 12, 14, 16 및 20핀 리드 없는 패키지의 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
DSBGA (YZP) | 10 | Ultra Librarian |
VSON (DRC) | 10 | Ultra Librarian |
VSSOP (DGS) | 10 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.