ADC3664-SP
- Screening and radiation performance
- QMLV screening and reliability assurance
- Total ionizing dose (TID): 300krad (Si)
- Single event latch-up (SEL): 75MeV-cm2/mg
- Ambient temperature range: -55°C to 105°C
- Dual Channel ADC
- 14-bit 125MSPS
- Noise floor: -156.9dBFS/Hz
- Low power consumption: 100mW/ch
- Latency: 2 clock cycles
- Clock rate versus voltage reference:
- External reference: 1MSPS to 125MSPS
- Internal reference: 100MSPS to 125MSPS
- 14-Bit, no missing codes
- Input bandwidth: 200MHz (-3dB)
- INL: ±2.6LSB; DNL: ±0.9LSB
- Optional digital down converter (DDC):
- Real or complex decimation
- Decimation by 2, 4, 8, 16, and 32
- 32-bit NCO
- Serial LVDS (SLVDS) interface (2-, 1-, and 1/2-wire)
- Spectral performance (FIN = 5MHz):
- SNR: 77.5dBFS
- SFDR: 84dBc HD2, HD3
- Non HD23: 91dBc
The ADC3664-SP is a low latency, low noise, and ultra low power, 14-bit, 125MSPS, high-speed dual channel ADC. Designed for best noise performance, the device delivers a noise spectral density of –156.9dBFS/Hz combined with excellent linearity and dynamic range. The ADC3664-SP offers DC precision together with IF sampling support to enable the design of a wide range of applications. The low latency architecture (as low as 1 clock cycle latency) and high sample rate also enable high speed control loops. The ADC consumes only 100mW/ch at 125MSPS and the power consumption scales well with sampling rate.
The device uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device also integrates a digital down converter (DDC) to help reduce the data rate and lower system power consumption. The device is pin-to-pin compatible with the 18-bit, 65MSPS ADC3683-SP. It comes in a 64-pin CFP package (10.9mm x 10.9mm) and supports a temperature range from –55°C to +105°C.
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設計與開發
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ADC3664EVM — 具有 SLVDS 介面的 ADC3664 雙路、14 位元、125-MSPS、高 SNR、低功耗 ADC 評估模組
ADC3664 評估模組 (EVM) 展示了 ADC3664 的性能，它是一種超低功耗、高線性、類比轉數位轉換器 (ADC)。車載電壓穩壓和彈性類比輸入選擇，可輕鬆評估多種不同應用。
對於完整評估系統，可使用 TSW1400EVM 資料擷取卡 (單獨出售) 及高速資料轉換器專業級軟體 (DATACONVERTERPRO-SW)。透過 FPGA 夾層介面卡 (FMC) 連接器與 TSW1400EVM 接合時，可以評估序列 CMOS 介面的資料擷取 (最高 512 MB)，包括實際和複雜的降取模式。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| CFP (HBP) | 64 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。