ESD752
- Robust surge protection:
- IEC 61000-4-5 (8/20 µs): 5.7 A or 2.5 A
- IEC 61000-4-2 level 4 ESD protection:
- ±30-kV or ±20-kV contact discharge
- ±30-kV or ±20-kV air-gap discharge
- 24 V working voltage
- Bidirectional ESD protection
- 2-channel device provides complete ESD and surge protection with single component
- Low clamping voltage protects downstream components
- I/O capacitance = 3 pF or 1.7 pF (typical)
- SOT-23 (DBZ) small, standard, common footprint
- SOT-323 / SC-70 (DCK) very small, standard, space saving, common footprint
- Leaded packages used for automatic optical inspection (AOI)
The ESD752 and ESD762 are bidirectional ESD protection diodes for USB power delivery (USB-PD) and industrial interfaces. The ESD752 and ESD762 are rated to dissipate contact ESD that meets or exceeds the maximum level specified in the IEC 61000-4-2 level 4 standard (±30-kV or ±20-kV contact and ±30-kV or ±20-kV airgap). The low dynamic resistance and low clamping voltage enables system level protection against transient events. This protection is key because industrial systems require a high level of robustness and reliability.
These devices feature a low IO capacitance per channel and a pin-out to suit two IO lines from damage caused by electrostatic discharge (ESD) and other transients. The IPP = 5.7 A (8/20 µs surge waveform) capability of the ESD752 makes it suitable for protecting USB VBUS against transient surge events as well as industrial I/O lines. Additionally, the 3 pF or 1.7 pF line capacitance of the ESD752 and ESD762 are suitable for protecting the slower speed signals for USB power delivery and IO signals for industrial applications.
The ESD752 and ESD762 are offered in two leaded packages for easy flow through routing.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ESD752 and ESD762 24-V, 2-Channel, ESD Protection With 5.7 A of 8/20 µsSurge Protection in a SOT-23 and SOT-323 / SC-70 Package datasheet (Rev. B) | PDF | HTML | 2022年 11月 22日 |
Application note | ESD and Surge Protection for USB Interfaces (Rev. B) | PDF | HTML | 2024年 1月 11日 | |
Selection guide | System-Level ESD Protection Guide (Rev. D) | 2022年 9月 7日 | ||
Application note | ESD Packaging and Layout Guide (Rev. B) | PDF | HTML | 2022年 8月 18日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ESDEVM — ESD 評估模組
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOT-23 (DBZ) | 3 | Ultra Librarian |
SOT-SC70 (DCK) | 3 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。