PGA117
- Rail-to-Rail Input and Output
- Offset: 25 µV (Typical), 100 µV
(Maximum) - Zerø Drift: 0.35 µV/°C (Typical), 1.2 µV/°C
(Maximum) - Low Noise: 12 nV/√Hz
- Input Offset Current: ±5 nA Maximum (25°C)
- Gain Error: 0.1% Maximum (G ≥ 32),
0.3% Maximum (G > 32) - Binary Gains: 1, 2, 4, 8, 16, 32, 64, 128 (PGA112,
PGA116) - Scope Gains: 1, 2, 5, 10, 20, 50, 100, 200
(PGA113, PGA117) - Gain Switching Time: 200 ns
- 2 Channel MUX: PGA112, PGA113
10 Channel MUX: PGA116, PGA117 - Four Internal Calibration Channels
- Amplifier Optimized for Driving CDAC ADCs
- Output Swing: 50 mV to Supply Rails
- AVDD and DVDD for Mixed Voltage Systems
- IQ = 1.1 mA (Typical)
- Software and Hardware Shutdown: IQ ≤ 4 µA
(Typical) - Temperature Range: –40°C to 125°C
- SPI™ Interface (10 MHz) With Daisy-Chain
Capability
The PGA112 and PGA113 devices (binary and scope gains) offer two analog inputs, a three-pin SPI interface, and software shutdown in a 10-pin, VSSOP package. The PGA116 and PGA117 (binary and scope gains) offer 10 analog inputs, a SPI interface with daisy-chain capability, and hardware and software shutdown in a 20-pin TSSOP package.
All versions provide internal calibration channels for system-level calibration. The channels are tied to GND, 0.9 VCAL, 0.1 VCAL, and VREF, respectively. VCAL, an external voltage connected to Channel 0, is used as the system calibration reference. Binary gains are: 1, 2, 4, 8, 16, 32, 64, and 128; scope gains are: 1, 2, 5, 10, 20, 50, 100, and 200.
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模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計
TIDA-00130 — 適用斷路器 (ACB/MCCB-ETU) 的零飄移 PGA 架構類比前端設計
此參考設計適用於模製外殼斷路器 (MCCB) 電子跳脫裝置。 程式化增益放大器的設計,可做為過電流接地故障繼電器的電流監控。此設計運用零漂移程式化放大器,提供 ±10% 拾取 (A) 準確度 和 0% 至 -20% 的延遲時間 (秒) 準確度。此外,本解決方案的設計用途為因應嚴苛的環境條件,其加入 -10 至 70 μm 的周圍不敏感度範圍,以及高電磁抗擾度等功能。最後,此設計的類比前端會與 TI MSP430 MCU 無縫介接,以加快評估速度及上市時間。
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
TSSOP (PW) | 20 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點