產品詳細資料

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15 BW at Acl (MHz) 370 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 2800 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 6.8 Iq per channel (typ) (mA) 23 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 6 Operating temperature range (°C) -55 to 125 Iout (typ) (mA) 120 2nd harmonic (dBc) 83 3rd harmonic (dBc) 97 Frequency of harmonic distortion measurement (MHz) 8 GBW (typ) (MHz) 300 Input bias current (max) (pA) 4600000 CMRR (typ) (dB) 80 Rating HiRel Enhanced Product
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 4.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 15 BW at Acl (MHz) 370 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 2800 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 6.8 Iq per channel (typ) (mA) 23 Rail-to-rail No Vos (offset voltage at 25°C) (max) (mV) 6 Operating temperature range (°C) -55 to 125 Iout (typ) (mA) 120 2nd harmonic (dBc) 83 3rd harmonic (dBc) 97 Frequency of harmonic distortion measurement (MHz) 8 GBW (typ) (MHz) 300 Input bias current (max) (pA) 4600000 CMRR (typ) (dB) 80 Rating HiRel Enhanced Product
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9
  • Controlled Baseline
  • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Fully Differential Architecture
  • Bandwidth: 370 MHz
  • Slew Rate: 2800 V/µs
  • IMD3: .95 dBc at 30 MHz
  • OIP3: 51 dBm at 30 MHz
  • Output Common-Mode Control
  • Wide Power Supply Voltage Range: 5 V, ±5 V, 12 V, 15 V
  • Centered Input Common-Mode Range
  • Evaluation Module Available
  • Controlled Baseline
  • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Fully Differential Architecture
  • Bandwidth: 370 MHz
  • Slew Rate: 2800 V/µs
  • IMD3: .95 dBc at 30 MHz
  • OIP3: 51 dBm at 30 MHz
  • Output Common-Mode Control
  • Wide Power Supply Voltage Range: 5 V, ±5 V, 12 V, 15 V
  • Centered Input Common-Mode Range
  • Evaluation Module Available

The THS4503 is a high-performance fully differential amplifier from Texas Instruments. The THS4503, without power-down capability, set new performance standards for fully differential amplifiers with unsurpassed linearity, supporting 14-bit operation through 40 MHz. Package options include the 8-pin MSOP with PowerPAD™ for a smaller footprint, enhanced ac performance, and improved thermal dissipation capability.

WARNING: The THS4503 may have low-level oscillation when the die temperature (also known as the junction temperature) exceeds 60°C. These devices are not recommended for new designs where the die temperature is expected to exceed 60°C. For more information, see Maximum Die Temperature to Oscillation.

The THS4503 is a high-performance fully differential amplifier from Texas Instruments. The THS4503, without power-down capability, set new performance standards for fully differential amplifiers with unsurpassed linearity, supporting 14-bit operation through 40 MHz. Package options include the 8-pin MSOP with PowerPAD™ for a smaller footprint, enhanced ac performance, and improved thermal dissipation capability.

WARNING: The THS4503 may have low-level oscillation when the die temperature (also known as the junction temperature) exceeds 60°C. These devices are not recommended for new designs where the die temperature is expected to exceed 60°C. For more information, see Maximum Die Temperature to Oscillation.

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類型 標題 日期
* Data sheet Wideband Low-Distortion Fully Differential Amplifiers datasheet (Rev. A) 2012年 1月 23日
* VID THS4503-EP VID V6205608 2016年 6月 21日
* Radiation & reliability report THS4503MDGNREP Reliability Report 2012年 1月 6日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

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