TPD4S009
- IEC 61000-4-2 Level 4 ESD Protection
- ±8-kV Contact Discharge
- IEC 61000-4-5 Surge Protection
- 2.5A (8/20µs)
- I/O Capacitance: 0.8 pF (Typical)
- Low Leakage Current: 10 nA (Typical)
- Supports High-Speed Differential Data Rates
(3-dB Bandwidth > 4 GHz) - Ultra-low Matching Capacitance Between
Differential Signal Pairs - Ioff Feature for the TPD4S009
- Industrial Temperature Range:
–40°C to 85°C - Easy Straight through Routing, Space-Saving
Package Options
The TPD4S009 and TPD4S010 are four-channel TVS diode arrays for electrostatic discharge (ESD) protection. TPD4S009 and TPD4S010 are rated to dissipate contact ESD strikes at the maximum level specified in the IEC 61000-4-2 international standard (Level 4), with ±8-kV contact discharge ESD protection. The low capacitance (0.8-pF) of these devices, coupled with the excellent matching between differential signal pairs (0.05-pF line-line capacitance for the TPD4S009DRY) enables this device to provide transient voltage suppression circuit protection for high-speed differential data rates (3-dB bandwidth > 4 GHz).
The TPD4S009 is offered in DBV, DCK, DGS, and DRY packages. The TPD4S009DRYR is the most space saving package option available for dual pair high-speed differential lines. The TPD4S010 is offered in the industry standard DQA package. The TPD4S009DGSR and TPD4S010DQAR offer flow-through board layout options to reduce signal glitches normally caused by routing mismatches between the D+ and D signal pair. See also TPD4E05U06DQAR which is P2P compatible with TPD4S010DQAR. This device offers higher IEC ESD protection, lower capacitance, lower RDYN, lower DC breakdown voltage, and lower clamping voltage.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TPD4S009 4-Channel ESD Solution for High-Speed Differential Interface datasheet (Rev. G) | PDF | HTML | 2015年 6月 26日 |
Application note | ESD and Surge Protection for USB Interfaces (Rev. B) | PDF | HTML | 2024年 1月 11日 | |
Application brief | ESD Protection for HDMI Applications (Rev. A) | PDF | HTML | 2023年 11月 1日 | |
Selection guide | System-Level ESD Protection Guide (Rev. D) | 2022年 9月 7日 | ||
Application note | ESD Packaging and Layout Guide (Rev. B) | PDF | HTML | 2022年 8月 18日 | |
White paper | Designing USB for short-to-battery tolerance in automotive environments | 2016年 2月 10日 | ||
Analog Design Journal | Design Considerations for System-Level ESD Circuit Protection | 2012年 9月 25日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ESDEVM — ESD 評估模組
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TIDA-00447 — 24V、100W/30W 雙無感測器無刷 DC 馬達驅動參考設計
TIDA-00436 — 堵轉電流限制為 <1us 響應時間的 36V/1kW 無刷 DC 馬達驅動參考設計
TIDA-00079 — 1 級 PoE - 高效率 IP 攝影機電源模組參考設計
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOT-23 (DBV) | 6 | Ultra Librarian |
SOT-SC70 (DCK) | 6 | Ultra Librarian |
USON (DRY) | 6 | Ultra Librarian |
VSSOP (DGS) | 10 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。