產品詳細資料

Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 11 CON (typ) (pF) 24 ON-state leakage current (max) (µA) 0.2 Supply current (typ) (µA) 2.5 Bandwidth (MHz) 165 Operating temperature range (°C) -40 to 85 Features Powered-off protection Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 11 CON (typ) (pF) 24 ON-state leakage current (max) (µA) 0.2 Supply current (typ) (µA) 2.5 Bandwidth (MHz) 165 Operating temperature range (°C) -40 to 85 Features Powered-off protection Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
SOIC (D) 16 59.4 mm² 9.9 x 6 SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4 TVSOP (DGV) 16 23.04 mm² 3.6 x 6.4 UQFN (RSV) 16 4.68 mm² 2.6 x 1.8 VQFN (RGY) 16 14 mm² 4 x 3.5
  • Isolation in the Powered-Down Mode, V+ = 0
  • Low ON-State Resistance
  • Low Charge Injection
  • Excellent ON-State Resistance Matching
  • Low Total Harmonic Distortion (THD)
  • 2.3-V to 3.6-V Single-Supply Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 1500-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Isolation in the Powered-Down Mode, V+ = 0
  • Low ON-State Resistance
  • Low Charge Injection
  • Excellent ON-State Resistance Matching
  • Low Total Harmonic Distortion (THD)
  • 2.3-V to 3.6-V Single-Supply Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 1500-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

The TS3A5017 device is a dual single-pole quadruple-throw (4:1) analog switch that is designed to operate from 2.3 V to 3.6 V. This device can handle both digital and analog signals, and signals up to V+ can be transmitted in either direction.

The TS3A5017 device is a dual single-pole quadruple-throw (4:1) analog switch that is designed to operate from 2.3 V to 3.6 V. This device can handle both digital and analog signals, and signals up to V+ can be transmitted in either direction.

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類型 標題 日期
* Data sheet TS3A5017 Dual SP4T Analog Switch / Multiplexer / Demultiplexer datasheet (Rev. G) PDF | HTML 2019年 1月 7日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 2021年 1月 6日
Application note Preventing Excess Power Consumption on Analog Switches 2008年 7月 3日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日

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LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

使用指南: PDF
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LEADLESS-ADAPTER1 — 用於測試 TI 的 6、8、10、12、14、16 和 20 針腳無引線封裝的表面貼裝至 DIP 接頭適配器

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
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參考設計

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電路圖: PDF
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This 16-button stainless steel keypad, which utilizes TI's inductive touch technology, demonstrates highly sensitive buttons on a single piece of 0.6mm thick stainless steel metal.  The design utilizes a MUXed approach to implement many buttons with a single LDC1614. The design is (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00110 — 適用於使用 RTD 的智慧電網應用中的溫度感測的類比前端 (AFE)

This reference design enables up to 4 Resistor Temperature Detectors (RTD) to be connected through one ADC in manner such that the solution is both compact and modular. Communication from the ADC to the processor is though an SPI interface. If 8 RTDs are required for an application, simply connect (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 16 Ultra Librarian
SSOP (DBQ) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
TVSOP (DGV) 16 Ultra Librarian
UQFN (RSV) 16 Ultra Librarian
VQFN (RGY) 16 Ultra Librarian

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