TSD36C
- IEC 61000-4-2 ESD protection:
- ±30kV contact discharge
- ±30kV air gap discharge
- IEC 61000-4-5 surge protection:
- 6.5-30A (8/20µs)
- Low IO capacitance < 7pF (typical)
- Ultra low leakage current: 10nA (maximum)
- Industrial temperature range: –55°C to +150°C
- Industry standard SOD-323 leaded package (2.65mm × 1.3mm)
The TSDxxC are a family of bidirectional TVS protection diodes designed for clamping harmful transients such as ESD and surge. The TSDxxC devices are rated to dissipate ESD strikes up to ±30kV (contact and air gap discharge) which exceeds the maximum level specified in the IEC 61000-4-2 international standard (Level 4).
Combining the robust clamping performance and low capacitance of these devices, TSDxxC are excellent TVS diodes to protect both data lines and power lines in many different applications.
The TSDxxC family is offered in the industry standard, leaded SOD-323 package to enable easy solderability.
技術文件
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檢視所有 1 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TSDxxC Bidirectional TVS Diodes in SOD-323 Package datasheet (Rev. C) | PDF | HTML | 2024年 10月 24日 |
設計與開發
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開發板
ESDEVM — ESD 評估模組
靜電敏感裝置 (ESD) 評估模組 (EVM) 是我們大多數 ESD 產品組合的開發平台。此電路板配備所有傳統 ESD 元件封裝，可測試任意數量的裝置。裝置可以焊接到其相應的元件封裝上，然後進行測試。對於一般高速 ESD 二極體，會實作阻抗控制的配置以取得 S 參數並取消內嵌電路板軌跡。對於非高速 ESD 二極體，其元件封裝會包含連接至測試點的軌跡，讓您輕鬆執行 DC 測試，例如崩潰電壓、保持電壓、洩漏等。電路板配置也可以透過將訊號針腳短路到訊號所在的任何地方，讓任何裝置針腳都能輕鬆地連接到電源 (VCC) 或接地。
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOT (DYF) | 2 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。