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74AC16244

AKTIV

16-Kanal-Puffer, 3 bis 5,5 V mit Tri-State-Ausgängen

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Datenblatt

74AC16244

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Technology family AC Supply voltage (min) (V) 3 Supply voltage (max) (V) 5.5 Number of channels 16 IOL (max) (mA) 24 Supply current (max) (µA) 80 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AC Supply voltage (min) (V) 3 Supply voltage (max) (V) 5.5 Number of channels 16 IOL (max) (mA) 24 Supply current (max) (µA) 80 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DL) 48 164.358 mm² 15.88 x 10.35 TSSOP (DGG) 48 101.25 mm² 12.5 x 8.1
  • Members of the Texas Instruments WidebusTM Family
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Flow-Through Architecture Optimizes PCB Layout
  • Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise
  • EPIC TM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages Using 25-mil Center-to-Center Pin Spacings, and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

 

EPIC and Widebus are trademarks of Texas Instruments Incorporated.
  • Members of the Texas Instruments WidebusTM Family
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Flow-Through Architecture Optimizes PCB Layout
  • Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise
  • EPIC TM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages Using 25-mil Center-to-Center Pin Spacings, and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

 

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

The 'AC16244 are 16-bit buffers/line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. They can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable inputs. When is low, the device passes noninverted data from the A inputs to the Y outputs. When is high, the outputs are in the high-impedance state.

The 74AC16244 is packaged in the TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 54AC16244 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74AC16244 is characterized for operation from -40°C to 85°C.

 

 

The 'AC16244 are 16-bit buffers/line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. They can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable inputs. When is low, the device passes noninverted data from the A inputs to the Y outputs. When is high, the outputs are in the high-impedance state.

The 74AC16244 is packaged in the TI's shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 54AC16244 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74AC16244 is characterized for operation from -40°C to 85°C.

 

 
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Technische Dokumentation

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Typ Titel Datum
* Data sheet 16-Bit Buffers/Line Drivers With 3-State Outputs datasheet (Rev. A) 01 Apr 1996

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  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
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