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Function General-purpose timer Iq (typ) (mA) 0.13 Rating Catalog Operating temperature range (°C) -55 to 125 Supply voltage (max) (V) 15 Supply voltage (min) (V) 2
Function General-purpose timer Iq (typ) (mA) 0.13 Rating Catalog Operating temperature range (°C) -55 to 125 Supply voltage (max) (V) 15 Supply voltage (min) (V) 2
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6
  • Very low power consumption:
    • 2mW typical at VDD = 5V
  • Capable of operation in astable mode
  • CMOS output capable of swinging rail to rail
  • High output-current capability
    • Sink: 100mA typical
    • Source: 10mA typical
  • Output fully compatible with CMOS, TTL, and MOS
  • Low supply current reduces spikes during output transitions
  • Single-supply operation from 2V to 15V
  • Functionally interchangeable with the NE556; has same pinout
  • Very low power consumption:
    • 2mW typical at VDD = 5V
  • Capable of operation in astable mode
  • CMOS output capable of swinging rail to rail
  • High output-current capability
    • Sink: 100mA typical
    • Source: 10mA typical
  • Output fully compatible with CMOS, TTL, and MOS
  • Low supply current reduces spikes during output transitions
  • Single-supply operation from 2V to 15V
  • Functionally interchangeable with the NE556; has same pinout

The TLC556 series are monolithic timing circuits fabricated using the TI LinCMOS™ process, which provides full compatibility with CMOS, TTL, and MOS logic and operates at frequencies up to 2MHz. Because of high input impedance, this device supports smaller timing capacitors than those supported by the NE556. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power supply voltages.

Like the NE556, the TLC556 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage pin (CONT). When the trigger input (TRIG) is less than the trigger level, the flip-flop is set and the output goes high. If TRIG is greater than the trigger level and the threshold input (THRES) is greater than the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) overrides all other inputs and is used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge pin (DISCH) and the ground pin (GND). Tie all unused inputs to an appropriate logic level to prevent false triggering.

Although the CMOS output is capable of sinking over 100mA and sourcing over 10mA, the TLC556 exhibits greatly reduced supply-current spikes during output transitions. This feature minimizes the need for the large decoupling capacitors required by the NE556.

The TLC556C is characterized for operation from 0°C to 70°C. The TLC556I is characterized for operation from −40°C to +85°C. The TLC556M is characterized for operation over the full military temperature range of −55°C to +125°C.

The TLC556 series are monolithic timing circuits fabricated using the TI LinCMOS™ process, which provides full compatibility with CMOS, TTL, and MOS logic and operates at frequencies up to 2MHz. Because of high input impedance, this device supports smaller timing capacitors than those supported by the NE556. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power supply voltages.

Like the NE556, the TLC556 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage pin (CONT). When the trigger input (TRIG) is less than the trigger level, the flip-flop is set and the output goes high. If TRIG is greater than the trigger level and the threshold input (THRES) is greater than the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) overrides all other inputs and is used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge pin (DISCH) and the ground pin (GND). Tie all unused inputs to an appropriate logic level to prevent false triggering.

Although the CMOS output is capable of sinking over 100mA and sourcing over 10mA, the TLC556 exhibits greatly reduced supply-current spikes during output transitions. This feature minimizes the need for the large decoupling capacitors required by the NE556.

The TLC556C is characterized for operation from 0°C to 70°C. The TLC556I is characterized for operation from −40°C to +85°C. The TLC556M is characterized for operation over the full military temperature range of −55°C to +125°C.

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* Data sheet TLC556x Dual LinCMOS™ Timers datasheet (Rev. C) PDF | HTML 12 Dez 2024

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TLC555x and TLC556x PSpice Model (Rev. E)

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TLC556 TINA-TI Astable Reference Design

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TLC556 TINA-TI Mono Reference Design

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TLC556 TINA-TI Spice Model (Rev. A)

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